Lines Matching defs:engine
45 /* max wait time for a SDMA engine to indicate it has halted */
47 /* all SDMA engine errors that cause a halt */
261 * sdma engine 'sde' to drop to 0.
285 dd_dev_err(dd, "%s: engine %u timeout waiting for packets to egress, remaining count %u, bouncing link\n",
400 * If the engine has been brought to running during
402 * that the process of bringing the engine to running
433 "SDMA engine %d - timeout waiting for engine to halt\n",
461 "SDMA engine %d - check scheduled\n",
477 /* check progress on each engine except the current one */
702 * sdma_engine_get_vl() - return vl for a given sdma engine
703 * @sde: sdma engine
705 * This function returns the vl mapped to a given engine, or an error if
730 * sdma_select_engine_vl() - select sdma engine
736 * This function returns an engine based on the selector and a vl. The
750 * Default will return engine 0 below
774 * sdma_select_engine_sc() - select sdma engine
780 * This function returns an engine based on the selector and an sc.
817 * sdma_select_user_engine() - select sdma engine based on user setup
822 * This function returns an sdma engine for a user sdma request.
823 * User defined sdma engine affinity setting is honored when applicable,
824 * otherwise system default sdma engine mapping is used. To ensure correct
835 * To ensure that always the same sdma engine(s) will be
888 * Prevents concurrent reads and writes of the sdma engine cpu_mask
1137 * @vl_engines: per vl engine mapping (optional)
1141 * vl_engines is used to specify a non-uniform vl/engine loading. NULL
1163 int engine = 0;
1196 int first_engine = engine;
1212 &dd->per_sdma[engine];
1213 if (++engine >= first_engine + vl_engines[i])
1214 /* wrap back to first engine */
1215 engine = first_engine;
1224 engine = first_engine + vl_engines[i];
1462 /* assign each engine to different cacheline and init registers */
1845 * sdma_engine_interrupt() - interrupt handler for engine
1846 * @sde: sdma engine
1849 * Status is a mask of the 3 possible interrupts for this engine. It will
1850 * contain bits _only_ for this SDMA engine. It will contain at least one
1869 * sdma_engine_error() - error handler for engine
1870 * @sde: sdma engine
1889 "SDMA (%u) engine error: 0x%llx state %s\n",
1999 * Set the SEND_DMA_CHECK_ENABLE register for send DMA engine 'sde'.
2165 * @sde: send dma engine to dump
2340 * @sde: sdma engine to use
2406 * @sde: sdma engine to use
2412 * which are added to SDMA engine flush list if the SDMA engine state is
2545 fallthrough; /* and start dma engine */
2918 /* notify caller this engine is done cleaning */
3242 * @sde: engine to allocate from
3274 * @sde: engine to return AHG entry
3294 * This event will pull the engine out of running so no more entries can be
3295 * added to the engine's queue.
3342 * software clean will read engine CSRs, so must be completed before
3343 * the next step, which will clear the engine CSRs.
3369 * _sdma_engine_progress_schedule() - schedule progress on engine