Lines Matching defs:cntr
1276 #define SW_IBP_CNTR(name, cntr) \
1281 access_ibp_##cntr)
1361 dd_dev_err(dd, "Invalid cntr register access mode");
1504 static inline u64 read_write_sw(struct hfi1_devdata *dd, u64 *cntr, int mode,
1510 ret = *cntr;
1512 *cntr = data;
1515 dd_dev_err(dd, "Invalid cntr sw access mode");
1597 u64 get_all_cpu_total(u64 __percpu *cntr)
1603 counter += *per_cpu_ptr(cntr, cpu);
1608 u64 __percpu *cntr,
1617 ret = get_all_cpu_total(cntr) - *z_val;
1621 *z_val = get_all_cpu_total(cntr);
1625 dd_dev_err(dd, "Invalid cntr sw cpu access mode");
4045 dd_dev_err(dd, "Invalid cntr register access mode");
4051 #define def_access_sw_cpu(cntr) \
4052 static u64 access_sw_cpu_##cntr(const struct cntr_entry *entry, \
4056 return read_write_cpu(ppd->dd, &ppd->ibport_data.rvp.z_ ##cntr, \
4057 ppd->ibport_data.rvp.cntr, vl, \
4065 #define def_access_ibp_counter(cntr) \
4066 static u64 access_ibp_##cntr(const struct cntr_entry *entry, \
4074 return read_write_sw(ppd->dd, &ppd->ibport_data.rvp.n_ ##cntr, \
12351 hfi1_cdbg(CNTR, "cntr: %s vl %d psval 0x%llx", entry->name, vl, *psval);
12402 hfi1_cdbg(CNTR, "cntr: %s vl %d psval 0x%llx", entry->name, vl, *psval);
12778 /* fill in port cntr names */