Lines Matching defs:mask
1833 enum c4iw_qp_attr_mask mask,
1847 (mask & C4IW_QP_ATTR_NEXT_STATE) ? attrs->next_state : -1);
1852 if (mask & C4IW_QP_ATTR_VALID_MODIFY) {
1857 if (mask & C4IW_QP_ATTR_ENABLE_RDMA_READ)
1859 if (mask & C4IW_QP_ATTR_ENABLE_RDMA_WRITE)
1861 if (mask & C4IW_QP_ATTR_ENABLE_RDMA_BIND)
1863 if (mask & C4IW_QP_ATTR_MAX_ORD) {
1870 if (mask & C4IW_QP_ATTR_MAX_IRD) {
1880 if (mask & C4IW_QP_ATTR_SQ_DB) {
1884 if (mask & C4IW_QP_ATTR_RQ_DB) {
1889 if (!(mask & C4IW_QP_ATTR_NEXT_STATE))
1898 if (!(mask & C4IW_QP_ATTR_LLP_STREAM_HANDLE)) {
1902 if (!(mask & C4IW_QP_ATTR_MPA_ATTR)) {
2361 enum c4iw_qp_attr_mask mask = 0;
2388 mask |= (attr_mask & IB_QP_STATE) ? C4IW_QP_ATTR_NEXT_STATE : 0;
2389 mask |= (attr_mask & IB_QP_ACCESS_FLAGS) ?
2401 mask |= (attr_mask & IB_QP_SQ_PSN) ? C4IW_QP_ATTR_SQ_DB : 0;
2402 mask |= (attr_mask & IB_QP_RQ_PSN) ? C4IW_QP_ATTR_RQ_DB : 0;
2404 (mask & (C4IW_QP_ATTR_SQ_DB|C4IW_QP_ATTR_RQ_DB)))
2407 return c4iw_modify_qp(rhp, qhp, mask, &attrs, 0);
2434 * XXX 0 mask == a SW interrupt for srq_limit reached...