Lines Matching refs:def
915 reg_def->def = raw;
923 reg_def->def &= ~SX9324_REG_AFE_CTRL0_CSIDLE_MASK;
924 reg_def->def |= ret << SX9324_REG_AFE_CTRL0_CSIDLE_SHIFT;
934 reg_def->def &= ~SX9324_REG_AFE_CTRL0_RINT_MASK;
935 reg_def->def |= ret << SX9324_REG_AFE_CTRL0_RINT_SHIFT;
952 reg_def->def &= ~SX9324_REG_AFE_CTRL4_RESOLUTION_MASK;
953 reg_def->def |= FIELD_PREP(SX9324_REG_AFE_CTRL4_RESOLUTION_MASK,
963 reg_def->def &= ~SX9324_REG_AFE_CTRL8_RESFILTIN_MASK;
964 reg_def->def |= FIELD_PREP(SX9324_REG_AFE_CTRL8_RESFILTIN_MASK,
984 reg_def->def &= ~SX9324_REG_AFE_CTRL9_AGAIN_MASK;
985 reg_def->def |= FIELD_PREP(SX9324_REG_AFE_CTRL9_AGAIN_MASK,
995 reg_def->def &= ~SX9324_REG_ADV_CTRL5_STARTUPSENS_MASK;
996 reg_def->def |= FIELD_PREP(SX9324_REG_ADV_CTRL5_STARTUPSENS_MASK,
1008 reg_def->def &= ~SX9324_REG_PROX_CTRL4_AVGPOSFILT_MASK;
1009 reg_def->def |= FIELD_PREP(SX9324_REG_PROX_CTRL4_AVGPOSFILT_MASK,
1024 reg_def->def &= ~SX9324_REG_PROX_CTRL0_RAWFILT_MASK;
1025 reg_def->def |= FIELD_PREP(SX9324_REG_PROX_CTRL0_RAWFILT_MASK,