Lines Matching defs:tsl2772_config
180 u8 tsl2772_config[TSL2772_MAX_CONFIG_REG];
711 chip->tsl2772_config[TSL2772_ALS_TIME] = chip->settings.als_time;
712 chip->tsl2772_config[TSL2772_PRX_TIME] = chip->settings.prox_time;
713 chip->tsl2772_config[TSL2772_WAIT_TIME] = chip->settings.wait_time;
714 chip->tsl2772_config[TSL2772_ALS_PRX_CONFIG] =
717 chip->tsl2772_config[TSL2772_ALS_MINTHRESHLO] =
719 chip->tsl2772_config[TSL2772_ALS_MINTHRESHHI] =
721 chip->tsl2772_config[TSL2772_ALS_MAXTHRESHLO] =
723 chip->tsl2772_config[TSL2772_ALS_MAXTHRESHHI] =
725 chip->tsl2772_config[TSL2772_PERSISTENCE] =
729 chip->tsl2772_config[TSL2772_PRX_COUNT] =
731 chip->tsl2772_config[TSL2772_PRX_MINTHRESHLO] =
733 chip->tsl2772_config[TSL2772_PRX_MINTHRESHHI] =
735 chip->tsl2772_config[TSL2772_PRX_MAXTHRESHLO] =
737 chip->tsl2772_config[TSL2772_PRX_MAXTHRESHHI] =
748 chip->tsl2772_config[TSL2772_GAIN] =
773 for (i = 0, dev_reg = chip->tsl2772_config;