Lines Matching defs:ps_ctrl_regs
139 u8 ps_ctrl_regs[CM36651_PS_REG_NUM];
162 cm36651->ps_ctrl_regs[CM36651_PS_CONF1] = CM36651_PS_ENABLE |
164 cm36651->ps_ctrl_regs[CM36651_PS_THD] = CM36651_PS_INITIAL_THD;
165 cm36651->ps_ctrl_regs[CM36651_PS_CANC] = CM36651_PS_CANC_DEFAULT;
166 cm36651->ps_ctrl_regs[CM36651_PS_CONF2] = CM36651_PS_HYS2 |
171 cm36651->ps_ctrl_regs[i]);
289 cm36651->ps_ctrl_regs[CM36651_PS_CONF1]);
497 *val = cm36651->ps_ctrl_regs[CM36651_PS_THD];
516 cm36651->ps_ctrl_regs[CM36651_PS_THD] = val;
518 cm36651->ps_ctrl_regs[CM36651_PS_THD]);