Lines Matching refs:st
25 struct ad5592r_state *st = gpiochip_get_data(chip);
29 mutex_lock(&st->gpio_lock);
31 if (st->gpio_out & BIT(offset))
32 val = st->gpio_val;
34 ret = st->ops->gpio_read(st, &val);
36 mutex_unlock(&st->gpio_lock);
46 struct ad5592r_state *st = gpiochip_get_data(chip);
48 mutex_lock(&st->gpio_lock);
51 st->gpio_val |= BIT(offset);
53 st->gpio_val &= ~BIT(offset);
55 st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
57 mutex_unlock(&st->gpio_lock);
62 struct ad5592r_state *st = gpiochip_get_data(chip);
65 mutex_lock(&st->gpio_lock);
67 st->gpio_out &= ~BIT(offset);
68 st->gpio_in |= BIT(offset);
70 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
74 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
77 mutex_unlock(&st->gpio_lock);
85 struct ad5592r_state *st = gpiochip_get_data(chip);
88 mutex_lock(&st->gpio_lock);
91 st->gpio_val |= BIT(offset);
93 st->gpio_val &= ~BIT(offset);
95 st->gpio_in &= ~BIT(offset);
96 st->gpio_out |= BIT(offset);
98 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
102 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
106 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
109 mutex_unlock(&st->gpio_lock);
116 struct ad5592r_state *st = gpiochip_get_data(chip);
118 if (!(st->gpio_map & BIT(offset))) {
119 dev_err(st->dev, "GPIO %d is reserved by alternate function\n",
131 static int ad5592r_gpio_init(struct ad5592r_state *st)
133 if (!st->gpio_map)
136 st->gpiochip.label = dev_name(st->dev);
137 st->gpiochip.base = -1;
138 st->gpiochip.ngpio = 8;
139 st->gpiochip.parent = st->dev;
140 st->gpiochip.can_sleep = true;
141 st->gpiochip.direction_input = ad5592r_gpio_direction_input;
142 st->gpiochip.direction_output = ad5592r_gpio_direction_output;
143 st->gpiochip.get = ad5592r_gpio_get;
144 st->gpiochip.set = ad5592r_gpio_set;
145 st->gpiochip.request = ad5592r_gpio_request;
146 st->gpiochip.owner = THIS_MODULE;
147 st->gpiochip.names = ad5592r_gpio_names;
149 mutex_init(&st->gpio_lock);
151 return gpiochip_add_data(&st->gpiochip, st);
154 static void ad5592r_gpio_cleanup(struct ad5592r_state *st)
156 if (st->gpio_map)
157 gpiochip_remove(&st->gpiochip);
160 static int ad5592r_reset(struct ad5592r_state *st)
164 gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW);
172 mutex_lock(&st->lock);
174 st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac);
175 mutex_unlock(&st->lock);
183 static int ad5592r_get_vref(struct ad5592r_state *st)
187 if (st->reg) {
188 ret = regulator_get_voltage(st->reg);
198 static int ad5592r_set_channel_modes(struct ad5592r_state *st)
200 const struct ad5592r_rw_ops *ops = st->ops;
206 for (i = 0; i < st->num_channels; i++) {
207 switch (st->channel_modes[i]) {
222 st->gpio_map |= BIT(i);
223 st->gpio_in |= BIT(i); /* Default to input */
228 switch (st->channel_offstate[i]) {
234 st->gpio_out |= BIT(i);
238 st->gpio_out |= BIT(i);
239 st->gpio_val |= BIT(i);
250 mutex_lock(&st->lock);
253 ret = ops->reg_write(st, AD5592R_REG_PULLDOWN, pulldown);
257 ret = ops->reg_write(st, AD5592R_REG_TRISTATE, tristate);
262 ret = ops->reg_write(st, AD5592R_REG_DAC_EN, dac);
266 ret = ops->reg_write(st, AD5592R_REG_ADC_EN, adc);
270 ret = ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
274 ret = ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
278 ret = ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
283 ret = ops->reg_read(st, AD5592R_REG_ADC_EN, &read_back);
288 mutex_unlock(&st->lock);
292 static int ad5592r_reset_channel_modes(struct ad5592r_state *st)
296 for (i = 0; i < ARRAY_SIZE(st->channel_modes); i++)
297 st->channel_modes[i] = CH_MODE_UNUSED;
299 return ad5592r_set_channel_modes(st);
305 struct ad5592r_state *st = iio_priv(iio_dev);
317 mutex_lock(&st->lock);
318 ret = st->ops->write_dac(st, chan->channel, val);
320 st->cached_dac[chan->channel] = val;
321 mutex_unlock(&st->lock);
327 if (val == st->scale_avail[0][0] &&
328 val2 == st->scale_avail[0][1])
330 else if (val == st->scale_avail[1][0] &&
331 val2 == st->scale_avail[1][1])
336 mutex_lock(&st->lock);
338 ret = st->ops->reg_read(st, AD5592R_REG_CTRL,
339 &st->cached_gp_ctrl);
341 mutex_unlock(&st->lock);
347 st->cached_gp_ctrl |=
350 st->cached_gp_ctrl &=
354 st->cached_gp_ctrl |=
357 st->cached_gp_ctrl &=
361 ret = st->ops->reg_write(st, AD5592R_REG_CTRL,
362 st->cached_gp_ctrl);
363 mutex_unlock(&st->lock);
379 struct ad5592r_state *st = iio_priv(iio_dev);
386 mutex_lock(&st->lock);
387 ret = st->ops->read_adc(st, chan->channel, &read_val);
388 mutex_unlock(&st->lock);
393 dev_err(st->dev, "Error while reading channel %u\n",
401 mutex_lock(&st->lock);
402 read_val = st->cached_dac[chan->channel];
403 mutex_unlock(&st->lock);
406 dev_dbg(st->dev, "Channel %u read: 0x%04hX\n",
412 *val = ad5592r_get_vref(st);
421 mutex_lock(&st->lock);
424 mult = !!(st->cached_gp_ctrl &
427 mult = !!(st->cached_gp_ctrl &
430 mutex_unlock(&st->lock);
438 ret = ad5592r_get_vref(st);
440 mutex_lock(&st->lock);
442 if (st->cached_gp_ctrl & AD5592R_REG_CTRL_ADC_RANGE)
447 mutex_unlock(&st->lock);
480 struct ad5592r_state *st = iio_priv(iio_dev);
483 st->scale_avail[0][0], st->scale_avail[0][1],
484 st->scale_avail[1][0], st->scale_avail[1][1]);
513 struct ad5592r_state *st = iio_priv(iio_dev);
515 num_channels = st->num_channels;
521 device_for_each_child_node(st->dev, child) {
523 if (ret || reg >= ARRAY_SIZE(st->channel_modes))
528 st->channel_modes[reg] = tmp;
532 st->channel_offstate[reg] = tmp;
535 channels = devm_kcalloc(st->dev,
542 switch (st->channel_modes[i]) {
582 static void ad5592r_init_scales(struct ad5592r_state *st, int vref_mV)
586 st->scale_avail[0][0] =
587 div_s64_rem(tmp, 1000000000LL, &st->scale_avail[0][1]);
588 st->scale_avail[1][0] =
589 div_s64_rem(tmp * 2, 1000000000LL, &st->scale_avail[1][1]);
596 struct ad5592r_state *st;
599 iio_dev = devm_iio_device_alloc(dev, sizeof(*st));
603 st = iio_priv(iio_dev);
604 st->dev = dev;
605 st->ops = ops;
606 st->num_channels = 8;
609 st->reg = devm_regulator_get_optional(dev, "vref");
610 if (IS_ERR(st->reg)) {
611 if ((PTR_ERR(st->reg) != -ENODEV) && dev_fwnode(dev))
612 return PTR_ERR(st->reg);
614 st->reg = NULL;
616 ret = regulator_enable(st->reg);
625 mutex_init(&st->lock);
627 ad5592r_init_scales(st, ad5592r_get_vref(st));
629 ret = ad5592r_reset(st);
633 ret = ops->reg_write(st, AD5592R_REG_PD,
634 (st->reg == NULL) ? AD5592R_REG_PD_EN_REF : 0);
642 ret = ad5592r_set_channel_modes(st);
650 ret = ad5592r_gpio_init(st);
660 ad5592r_reset_channel_modes(st);
663 if (st->reg)
664 regulator_disable(st->reg);
673 struct ad5592r_state *st = iio_priv(iio_dev);
676 ad5592r_reset_channel_modes(st);
677 ad5592r_gpio_cleanup(st);
679 if (st->reg)
680 regulator_disable(st->reg);