Lines Matching refs:st
174 struct ad74413r_state *st = context;
176 ad74413r_format_reg_write(reg, val, st->reg_tx_buf);
178 return spi_write(st->spi, st->reg_tx_buf, AD74413R_FRAME_SIZE);
181 static int ad74413r_crc_check(struct ad74413r_state *st, u8 *buf)
186 dev_err(st->dev, "Bad CRC %02x for %02x%02x%02x\n",
196 struct ad74413r_state *st = context;
199 .tx_buf = st->reg_tx_buf,
204 .rx_buf = st->reg_rx_buf,
211 st->reg_tx_buf);
213 ret = spi_sync_transfer(st->spi, reg_read_xfer,
218 ret = ad74413r_crc_check(st, st->reg_rx_buf);
222 *val = get_unaligned_be16(&st->reg_rx_buf[1]);
234 static int ad74413r_set_gpo_config(struct ad74413r_state *st,
237 return regmap_update_bits(st->regmap, AD74413R_REG_GPO_CONFIG_X(offset),
248 static int ad74413r_set_comp_debounce(struct ad74413r_state *st,
261 return regmap_update_bits(st->regmap,
267 static int ad74413r_set_comp_drive_strength(struct ad74413r_state *st,
273 return regmap_update_bits(st->regmap, AD74413R_REG_DIN_CONFIG_X(offset),
282 struct ad74413r_state *st = gpiochip_get_data(chip);
283 unsigned int real_offset = st->gpo_gpio_offsets[offset];
286 ret = ad74413r_set_gpo_config(st, real_offset,
291 regmap_update_bits(st->regmap, AD74413R_REG_GPO_CONFIG_X(real_offset),
300 struct ad74413r_state *st = gpiochip_get_data(chip);
307 unsigned int real_offset = st->gpo_gpio_offsets[offset];
309 ret = ad74413r_set_gpo_config(st, real_offset,
319 regmap_update_bits(st->regmap, AD74413R_REG_GPO_PAR_DATA,
325 struct ad74413r_state *st = gpiochip_get_data(chip);
326 unsigned int real_offset = st->comp_gpio_offsets[offset];
330 ret = regmap_read(st->regmap, AD74413R_REG_DIN_COMP_OUT, &status);
343 struct ad74413r_state *st = gpiochip_get_data(chip);
348 ret = regmap_read(st->regmap, AD74413R_REG_DIN_COMP_OUT, &val);
353 unsigned int real_offset = st->comp_gpio_offsets[offset];
377 struct ad74413r_state *st = gpiochip_get_data(chip);
378 unsigned int real_offset = st->gpo_gpio_offsets[offset];
382 return ad74413r_set_gpo_config(st, real_offset,
385 return ad74413r_set_gpo_config(st, real_offset,
396 struct ad74413r_state *st = gpiochip_get_data(chip);
397 unsigned int real_offset = st->comp_gpio_offsets[offset];
401 return ad74413r_set_comp_debounce(st, real_offset,
408 static int ad74413r_reset(struct ad74413r_state *st)
412 if (st->reset_gpio) {
413 gpiod_set_value_cansleep(st->reset_gpio, 1);
415 gpiod_set_value_cansleep(st->reset_gpio, 0);
419 ret = regmap_write(st->regmap, AD74413R_REG_CMD_KEY,
424 return regmap_write(st->regmap, AD74413R_REG_CMD_KEY,
428 static int ad74413r_set_channel_dac_code(struct ad74413r_state *st,
436 return regmap_multi_reg_write(st->regmap, reg_seq, 2);
439 static int ad74413r_set_channel_function(struct ad74413r_state *st,
444 ret = regmap_update_bits(st->regmap,
451 ret = regmap_set_bits(st->regmap,
458 static int ad74413r_set_adc_conv_seq(struct ad74413r_state *st,
467 ret = regmap_write_bits(st->regmap, AD74413R_REG_ADC_CONV_CTRL,
481 static int ad74413r_set_adc_channel_enable(struct ad74413r_state *st,
485 return regmap_update_bits(st->regmap, AD74413R_REG_ADC_CONV_CTRL,
490 static int ad74413r_get_adc_range(struct ad74413r_state *st,
496 ret = regmap_read(st->regmap, AD74413R_REG_ADC_CONFIG_X(channel), val);
505 static int ad74413r_get_adc_rejection(struct ad74413r_state *st,
511 ret = regmap_read(st->regmap, AD74413R_REG_ADC_CONFIG_X(channel), val);
520 static int ad74413r_set_adc_rejection(struct ad74413r_state *st,
524 return regmap_update_bits(st->regmap,
531 static int ad74413r_rejection_to_rate(struct ad74413r_state *st,
548 dev_err(st->dev, "ADC rejection invalid\n");
553 static int ad74413r_rate_to_rejection(struct ad74413r_state *st,
570 dev_err(st->dev, "ADC rate invalid\n");
575 static int ad74413r_range_to_voltage_range(struct ad74413r_state *st,
590 dev_err(st->dev, "ADC range invalid\n");
595 static int ad74413r_range_to_voltage_offset(struct ad74413r_state *st,
608 dev_err(st->dev, "ADC range invalid\n");
613 static int ad74413r_range_to_voltage_offset_raw(struct ad74413r_state *st,
628 dev_err(st->dev, "ADC range invalid\n");
633 static int ad74413r_get_output_voltage_scale(struct ad74413r_state *st,
642 static int ad74413r_get_output_current_scale(struct ad74413r_state *st,
645 *val = regulator_get_voltage(st->refin_reg);
646 *val2 = st->sense_resistor_ohms * AD74413R_DAC_CODE_MAX * 1000;
651 static int ad74413r_get_input_voltage_scale(struct ad74413r_state *st,
658 ret = ad74413r_get_adc_range(st, channel, &range);
662 ret = ad74413r_range_to_voltage_range(st, range, val);
671 static int ad74413r_get_input_voltage_offset(struct ad74413r_state *st,
677 ret = ad74413r_get_adc_range(st, channel, &range);
681 ret = ad74413r_range_to_voltage_offset_raw(st, range, val);
688 static int ad74413r_get_input_current_scale(struct ad74413r_state *st,
695 ret = ad74413r_get_adc_range(st, channel, &range);
699 ret = ad74413r_range_to_voltage_range(st, range, val);
703 *val2 = AD74413R_ADC_RESULT_MAX * st->sense_resistor_ohms;
708 static int ad74413_get_input_current_offset(struct ad74413r_state *st,
716 ret = ad74413r_get_adc_range(st, channel, &range);
720 ret = ad74413r_range_to_voltage_range(st, range, &voltage_range);
724 ret = ad74413r_range_to_voltage_offset(st, range, &voltage_offset);
733 static int ad74413r_get_adc_rate(struct ad74413r_state *st,
739 ret = ad74413r_get_adc_rejection(st, channel, &rejection);
743 ret = ad74413r_rejection_to_rate(st, rejection, val);
750 static int ad74413r_set_adc_rate(struct ad74413r_state *st,
756 ret = ad74413r_rate_to_rejection(st, val, &rejection);
760 return ad74413r_set_adc_rejection(st, channel, rejection);
767 struct ad74413r_state *st = iio_priv(indio_dev);
768 u8 *rx_buf = st->adc_samples_buf.rx_buf;
772 ret = spi_sync(st->spi, &st->adc_samples_msg);
776 for (i = 0; i < st->adc_active_channels; i++)
777 ad74413r_crc_check(st, &rx_buf[i * AD74413R_FRAME_SIZE]);
779 iio_push_to_buffers_with_timestamp(indio_dev, &st->adc_samples_buf,
791 struct ad74413r_state *st = iio_priv(indio_dev);
794 iio_trigger_poll(st->trig);
796 complete(&st->adc_data_completion);
801 static int _ad74413r_get_single_adc_result(struct ad74413r_state *st,
807 reinit_completion(&st->adc_data_completion);
809 ret = ad74413r_set_adc_channel_enable(st, channel, true);
813 ret = ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_SINGLE);
817 ret = wait_for_completion_timeout(&st->adc_data_completion,
824 ret = regmap_read(st->regmap, AD74413R_REG_ADC_RESULT_X(channel),
829 ret = ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_OFF);
833 ret = ad74413r_set_adc_channel_enable(st, channel, false);
845 struct ad74413r_state *st = iio_priv(indio_dev);
852 mutex_lock(&st->lock);
853 ret = _ad74413r_get_single_adc_result(st, channel, val);
854 mutex_unlock(&st->lock);
873 struct ad74413r_state *st = iio_priv(indio_dev);
874 struct spi_transfer *xfer = st->adc_samples_xfer;
875 u8 *rx_buf = st->adc_samples_buf.rx_buf;
876 u8 *tx_buf = st->adc_samples_tx_buf;
880 mutex_lock(&st->lock);
882 spi_message_init(&st->adc_samples_msg);
883 st->adc_active_channels = 0;
886 ret = ad74413r_set_adc_channel_enable(st, channel, false);
908 ret = ad74413r_set_adc_channel_enable(st, channel, true);
912 st->adc_active_channels++;
914 if (xfer == st->adc_samples_xfer)
927 spi_message_add_tail(xfer, &st->adc_samples_msg);
930 if (xfer != st->adc_samples_xfer)
940 spi_message_add_tail(xfer, &st->adc_samples_msg);
943 mutex_unlock(&st->lock);
950 struct ad74413r_state *st = iio_priv(indio_dev);
952 return ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_CONTINUOUS);
957 struct ad74413r_state *st = iio_priv(indio_dev);
959 return ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_OFF);
966 struct ad74413r_state *st = iio_priv(indio_dev);
973 return ad74413r_get_output_voltage_scale(st,
976 return ad74413r_get_input_voltage_scale(st,
980 return ad74413r_get_output_current_scale(st,
983 return ad74413r_get_input_current_scale(st,
991 return ad74413r_get_input_voltage_offset(st,
994 return ad74413_get_input_current_offset(st,
1018 return ad74413r_get_adc_rate(st, chan->channel, val);
1028 struct ad74413r_state *st = iio_priv(indio_dev);
1036 dev_err(st->dev, "Invalid DAC code\n");
1040 return ad74413r_set_channel_dac_code(st, chan->channel, val);
1042 return ad74413r_set_adc_rate(st, chan->channel, val);
1053 struct ad74413r_state *st = iio_priv(indio_dev);
1057 if (st->chip_info->hart_support) {
1180 struct ad74413r_state *st = iio_priv(indio_dev);
1187 dev_err(st->dev, "Failed to read channel reg: %d\n", ret);
1192 dev_err(st->dev, "Channel index %u is too large\n", index);
1196 config = &st->channel_configs[index];
1198 dev_err(st->dev, "Channel %u already initialized\n", index);
1206 dev_err(st->dev, "Invalid channel function %u\n", config->func);
1210 if (!st->chip_info->hart_support &&
1213 dev_err(st->dev, "Unsupported HART function %u\n", config->func);
1219 st->num_comparator_gpios++;
1228 st->num_gpo_gpios++;
1239 struct ad74413r_state *st = iio_priv(indio_dev);
1243 fwnode_for_each_available_child_node(dev_fwnode(st->dev), channel_node) {
1259 struct ad74413r_state *st = iio_priv(indio_dev);
1265 channels = devm_kcalloc(st->dev, sizeof(*channels),
1273 config = &st->channel_configs[i];
1289 ret = ad74413r_set_channel_function(st, i, config->func);
1299 static int ad74413r_setup_gpios(struct ad74413r_state *st)
1310 config = &st->channel_configs[i];
1316 st->gpo_gpio_offsets[gpo_gpio_i++] = i;
1321 st->comp_gpio_offsets[comp_gpio_i++] = i;
1324 ret = ad74413r_set_comp_drive_strength(st, i, strength);
1329 ret = ad74413r_set_gpo_config(st, i, gpo_config);
1344 struct ad74413r_state *st;
1348 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
1352 st = iio_priv(indio_dev);
1354 st->spi = spi;
1355 st->dev = &spi->dev;
1356 st->chip_info = device_get_match_data(&spi->dev);
1357 if (!st->chip_info) {
1361 st->chip_info =
1363 if (!st->chip_info)
1367 mutex_init(&st->lock);
1368 init_completion(&st->adc_data_completion);
1370 st->regmap = devm_regmap_init(st->dev, NULL, st,
1372 if (IS_ERR(st->regmap))
1373 return PTR_ERR(st->regmap);
1375 st->reset_gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW);
1376 if (IS_ERR(st->reset_gpio))
1377 return PTR_ERR(st->reset_gpio);
1379 st->refin_reg = devm_regulator_get(st->dev, "refin");
1380 if (IS_ERR(st->refin_reg))
1381 return dev_err_probe(st->dev, PTR_ERR(st->refin_reg),
1384 ret = regulator_enable(st->refin_reg);
1388 ret = devm_add_action_or_reset(st->dev, ad74413r_regulator_disable,
1389 st->refin_reg);
1393 st->sense_resistor_ohms = 100000000;
1394 device_property_read_u32(st->dev, "shunt-resistor-micro-ohms",
1395 &st->sense_resistor_ohms);
1396 st->sense_resistor_ohms /= 1000000;
1398 st->trig = devm_iio_trigger_alloc(st->dev, "%s-dev%d",
1399 st->chip_info->name, iio_device_id(indio_dev));
1400 if (!st->trig)
1403 st->trig->ops = &ad74413r_trigger_ops;
1404 iio_trigger_set_drvdata(st->trig, st);
1406 ret = devm_iio_trigger_register(st->dev, st->trig);
1410 indio_dev->name = st->chip_info->name;
1413 indio_dev->trig = iio_trigger_get(st->trig);
1415 ret = ad74413r_reset(st);
1427 ret = ad74413r_setup_gpios(st);
1431 if (st->num_gpo_gpios) {
1432 st->gpo_gpiochip.owner = THIS_MODULE;
1433 st->gpo_gpiochip.label = st->chip_info->name;
1434 st->gpo_gpiochip.base = -1;
1435 st->gpo_gpiochip.ngpio = st->num_gpo_gpios;
1436 st->gpo_gpiochip.parent = st->dev;
1437 st->gpo_gpiochip.can_sleep = true;
1438 st->gpo_gpiochip.set = ad74413r_gpio_set;
1439 st->gpo_gpiochip.set_multiple = ad74413r_gpio_set_multiple;
1440 st->gpo_gpiochip.set_config = ad74413r_gpio_set_gpo_config;
1441 st->gpo_gpiochip.get_direction =
1444 ret = devm_gpiochip_add_data(st->dev, &st->gpo_gpiochip, st);
1449 if (st->num_comparator_gpios) {
1450 st->comp_gpiochip.owner = THIS_MODULE;
1451 st->comp_gpiochip.label = st->chip_info->name;
1452 st->comp_gpiochip.base = -1;
1453 st->comp_gpiochip.ngpio = st->num_comparator_gpios;
1454 st->comp_gpiochip.parent = st->dev;
1455 st->comp_gpiochip.can_sleep = true;
1456 st->comp_gpiochip.get = ad74413r_gpio_get;
1457 st->comp_gpiochip.get_multiple = ad74413r_gpio_get_multiple;
1458 st->comp_gpiochip.set_config = ad74413r_gpio_set_comp_config;
1459 st->comp_gpiochip.get_direction =
1462 ret = devm_gpiochip_add_data(st->dev, &st->comp_gpiochip, st);
1467 ret = ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_OFF);
1471 ret = devm_request_irq(st->dev, spi->irq, ad74413r_adc_data_interrupt,
1472 0, st->chip_info->name, indio_dev);
1474 return dev_err_probe(st->dev, ret, "Failed to request irq\n");
1476 ret = devm_iio_triggered_buffer_setup(st->dev, indio_dev,
1483 return devm_iio_device_register(st->dev, indio_dev);