Lines Matching refs:data
248 * data reads, configuration updates
266 static bool ads1015_event_channel_enabled(struct ads1015_data *data)
268 return (data->event_channel != ADS1015_CHANNELS);
271 static void ads1015_event_channel_enable(struct ads1015_data *data, int chan,
274 WARN_ON(ads1015_event_channel_enabled(data));
276 data->event_channel = chan;
277 data->comp_mode = comp_mode;
280 static void ads1015_event_channel_disable(struct ads1015_data *data, int chan)
282 data->event_channel = ADS1015_CHANNELS;
371 static int ads1015_set_power_state(struct ads1015_data *data, bool on)
374 struct device *dev = regmap_get_device(data->regmap);
388 static int ads1015_set_power_state(struct ads1015_data *data, bool on)
396 int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
398 const int *data_rate = data->chip->data_rate;
405 ret = regmap_read(data->regmap, ADS1015_CFG_REG, &old);
409 pga = data->channel_data[chan].pga;
410 dr = data->channel_data[chan].data_rate;
416 if (ads1015_event_channel_enabled(data)) {
418 cfg |= data->thresh_data[chan].comp_queue <<
420 data->comp_mode <<
426 ret = regmap_write(data->regmap, ADS1015_CFG_REG, cfg);
429 data->conv_invalid = true;
431 if (data->conv_invalid) {
437 data->conv_invalid = false;
440 return regmap_read(data->regmap, ADS1015_CONV_REG, val);
447 struct ads1015_data *data = iio_priv(indio_dev);
457 mutex_lock(&data->lock);
460 ret = ads1015_get_adc_result(data, chan, &res);
462 mutex_unlock(&data->lock);
467 mutex_unlock(&data->lock);
478 static int ads1015_set_scale(struct ads1015_data *data,
488 data->channel_data[chan->address].pga = i;
496 static int ads1015_set_data_rate(struct ads1015_data *data, int chan, int rate)
500 for (i = 0; i < data->chip->data_rate_len; i++) {
501 if (data->chip->data_rate[i] == rate) {
502 data->channel_data[chan].data_rate = i;
515 struct ads1015_data *data = iio_priv(indio_dev);
523 *vals = data->chip->scale;
524 *length = data->chip->scale_len;
528 *vals = data->chip->data_rate;
529 *length = data->chip->data_rate_len;
541 struct ads1015_data *data = iio_priv(indio_dev);
543 mutex_lock(&data->lock);
550 if (ads1015_event_channel_enabled(data) &&
551 data->event_channel != chan->address) {
556 ret = ads1015_set_power_state(data, true);
560 ret = ads1015_get_adc_result(data, chan->address, val);
562 ads1015_set_power_state(data, false);
569 ret = ads1015_set_power_state(data, false);
578 idx = data->channel_data[chan->address].pga;
584 idx = data->channel_data[chan->address].data_rate;
585 *val = data->chip->data_rate[idx];
592 mutex_unlock(&data->lock);
601 struct ads1015_data *data = iio_priv(indio_dev);
604 mutex_lock(&data->lock);
607 ret = ads1015_set_scale(data, chan, val, val2);
610 ret = ads1015_set_data_rate(data, chan->address, val);
616 mutex_unlock(&data->lock);
626 struct ads1015_data *data = iio_priv(indio_dev);
632 mutex_lock(&data->lock);
637 data->thresh_data[chan->address].high_thresh :
638 data->thresh_data[chan->address].low_thresh;
642 dr = data->channel_data[chan->address].data_rate;
643 comp_queue = data->thresh_data[chan->address].comp_queue;
645 USEC_PER_SEC / data->chip->data_rate[dr];
656 mutex_unlock(&data->lock);
666 struct ads1015_data *data = iio_priv(indio_dev);
667 const int *data_rate = data->chip->data_rate;
674 mutex_lock(&data->lock);
683 data->thresh_data[chan->address].high_thresh = val;
685 data->thresh_data[chan->address].low_thresh = val;
688 dr = data->channel_data[chan->address].data_rate;
696 data->thresh_data[chan->address].comp_queue = i;
703 mutex_unlock(&data->lock);
712 struct ads1015_data *data = iio_priv(indio_dev);
715 mutex_lock(&data->lock);
716 if (data->event_channel == chan->address) {
722 ret = (data->comp_mode == ADS1015_CFG_COMP_MODE_WINDOW);
729 mutex_unlock(&data->lock);
734 static int ads1015_enable_event_config(struct ads1015_data *data,
737 int low_thresh = data->thresh_data[chan->address].low_thresh;
738 int high_thresh = data->thresh_data[chan->address].high_thresh;
742 if (ads1015_event_channel_enabled(data)) {
743 if (data->event_channel != chan->address ||
744 (data->comp_mode == ADS1015_CFG_COMP_MODE_TRAD &&
755 ret = regmap_write(data->regmap, ADS1015_LO_THRESH_REG,
760 ret = regmap_write(data->regmap, ADS1015_HI_THRESH_REG,
765 ret = ads1015_set_power_state(data, true);
769 ads1015_event_channel_enable(data, chan->address, comp_mode);
771 ret = ads1015_get_adc_result(data, chan->address, &val);
773 ads1015_event_channel_disable(data, chan->address);
774 ads1015_set_power_state(data, false);
780 static int ads1015_disable_event_config(struct ads1015_data *data,
785 if (!ads1015_event_channel_enabled(data))
788 if (data->event_channel != chan->address)
791 if (data->comp_mode == ADS1015_CFG_COMP_MODE_TRAD &&
795 ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
802 ads1015_event_channel_disable(data, chan->address);
804 return ads1015_set_power_state(data, false);
811 struct ads1015_data *data = iio_priv(indio_dev);
816 mutex_lock(&data->lock);
821 mutex_unlock(&data->lock);
826 ret = ads1015_enable_event_config(data, chan, comp_mode);
828 ret = ads1015_disable_event_config(data, chan, comp_mode);
831 mutex_unlock(&data->lock);
839 struct ads1015_data *data = iio_priv(indio_dev);
844 ret = regmap_read(data->regmap, ADS1015_CONV_REG, &val);
848 if (ads1015_event_channel_enabled(data)) {
852 dir = data->comp_mode == ADS1015_CFG_COMP_MODE_TRAD ?
854 code = IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, data->event_channel,
864 struct ads1015_data *data = iio_priv(indio_dev);
867 if (ads1015_event_channel_enabled(data))
903 struct ads1015_data *data = iio_priv(indio_dev);
944 data->channel_data[channel].pga = pga;
945 data->channel_data[channel].data_rate = data_rate;
958 struct ads1015_data *data = iio_priv(indio_dev);
965 data->channel_data[k].pga = ADS1015_DEFAULT_PGA;
966 data->channel_data[k].data_rate = ADS1015_DEFAULT_DATA_RATE;
970 static int ads1015_set_conv_mode(struct ads1015_data *data, int mode)
972 return regmap_update_bits(data->regmap, ADS1015_CFG_REG,
982 struct ads1015_data *data;
992 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
996 data = iio_priv(indio_dev);
999 mutex_init(&data->lock);
1007 data->chip = chip;
1008 data->event_channel = ADS1015_CHANNELS;
1017 data->thresh_data[i].low_thresh = -1 << (realbits - 1);
1018 data->thresh_data[i].high_thresh = (1 << (realbits - 1)) - 1;
1024 data->regmap = devm_regmap_init_i2c(client, chip->has_comparator ?
1027 if (IS_ERR(data->regmap)) {
1029 return PTR_ERR(data->regmap);
1062 ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
1075 ret = ads1015_set_conv_mode(data, ADS1015_CONTINUOUS);
1079 data->conv_invalid = true;
1100 struct ads1015_data *data = iio_priv(indio_dev);
1109 ret = ads1015_set_conv_mode(data, ADS1015_SINGLESHOT);
1119 struct ads1015_data *data = iio_priv(indio_dev);
1121 return ads1015_set_conv_mode(data, ADS1015_SINGLESHOT);
1127 struct ads1015_data *data = iio_priv(indio_dev);
1130 ret = ads1015_set_conv_mode(data, ADS1015_CONTINUOUS);
1132 data->conv_invalid = true;
1185 { .compatible = "ti,ads1015", .data = &ads1015_data },
1186 { .compatible = "ti,ads1115", .data = &ads1115_data },
1187 { .compatible = "ti,tla2024", .data = &tla2024_data },