Lines Matching defs:dev
675 static int stm32_adc_hw_stop(struct device *dev)
677 struct iio_dev *indio_dev = dev_get_drvdata(dev);
688 static int stm32_adc_hw_start(struct device *dev)
690 struct iio_dev *indio_dev = dev_get_drvdata(dev);
725 dev_dbg(&indio_dev->dev, "Enable VDDCore\n");
730 dev_dbg(&indio_dev->dev, "Enable VDDCPU\n");
735 dev_dbg(&indio_dev->dev, "Enable VDDQ_DDR\n");
740 dev_dbg(&indio_dev->dev, "Enable VREFInt\n");
745 dev_dbg(&indio_dev->dev, "Enable VBAT\n");
868 dev_warn(&indio_dev->dev, "stop failed\n");
917 dev_err(&indio_dev->dev, "Failed to exit power down\n");
946 dev_err(&indio_dev->dev, "Failed to enable ADC\n");
970 dev_warn(&indio_dev->dev, "Failed to disable\n");
995 dev_err(&indio_dev->dev, "Failed to read calfact\n");
1035 dev_err(&indio_dev->dev, "Failed to write calfact\n");
1051 dev_err(&indio_dev->dev, "Failed to read calfact\n");
1056 dev_err(&indio_dev->dev, "calfact not consistent\n");
1113 dev_err(&indio_dev->dev, "calibration (single-ended) error %d\n", ret);
1129 dev_err(&indio_dev->dev, "calibration (diff%s) error %d\n",
1274 dev_dbg(&indio_dev->dev, "%s chan %d to SQ%d\n",
1409 struct device *dev = indio_dev->dev.parent;
1419 ret = pm_runtime_resume_and_get(dev);
1458 pm_runtime_mark_last_busy(dev);
1459 pm_runtime_put_autosuspend(dev);
1534 dev_err(&indio_dev->dev, "Overrun, stopping: restart needed\n");
1615 struct device *dev = indio_dev->dev.parent;
1618 ret = pm_runtime_resume_and_get(dev);
1625 pm_runtime_mark_last_busy(dev);
1626 pm_runtime_put_autosuspend(dev);
1662 struct device *dev = indio_dev->dev.parent;
1665 ret = pm_runtime_resume_and_get(dev);
1674 pm_runtime_mark_last_busy(dev);
1675 pm_runtime_put_autosuspend(dev);
1729 dev_dbg(&indio_dev->dev, "%s bufi=%d\n", __func__, adc->bufi);
1753 dev_dbg(&indio_dev->dev, "%s size=%d watermark=%d\n", __func__,
1784 struct device *dev = indio_dev->dev.parent;
1787 ret = pm_runtime_resume_and_get(dev);
1793 dev_err(&indio_dev->dev, "Can't set trigger\n");
1799 dev_err(&indio_dev->dev, "Can't start dma\n");
1818 pm_runtime_mark_last_busy(dev);
1819 pm_runtime_put_autosuspend(dev);
1827 struct device *dev = indio_dev->dev.parent;
1839 dev_err(&indio_dev->dev, "Can't clear trigger\n");
1841 pm_runtime_mark_last_busy(dev);
1842 pm_runtime_put_autosuspend(dev);
1858 dev_dbg(&indio_dev->dev, "%s bufi=%d\n", __func__, adc->bufi);
1902 struct device *dev = &indio_dev->dev;
1907 if (device_property_read_u32(dev, "assigned-resolution-bits", &res))
1914 dev_err(&indio_dev->dev, "Bad resolution: %u bits\n", res);
1918 dev_dbg(&indio_dev->dev, "Using %u bits resolution\n", res);
1992 struct device *dev = &indio_dev->dev;
1996 dev_dbg(&indio_dev->dev, "using legacy channel config\n");
1998 ret = device_property_count_u32(dev, "st,adc-channels");
2000 dev_err(&indio_dev->dev, "Bad st,adc-channels?\n");
2010 ret = device_property_count_u32(dev, "st,adc-diff-channels");
2014 dev_err(&indio_dev->dev, "Bad st,adc-diff-channels?\n");
2023 adc->nsmps = device_property_count_u32(dev, "st,min-sample-time-nsecs");
2025 dev_err(&indio_dev->dev, "Invalid st,min-sample-time-nsecs\n");
2039 struct device *dev = &indio_dev->dev;
2047 ret = device_property_read_u32_array(dev, "st,adc-diff-channels",
2050 dev_err(&indio_dev->dev, "Failed to get diff channels %d\n", ret);
2057 dev_err(&indio_dev->dev, "Invalid channel in%d-in%d\n",
2069 ret = device_property_read_u32_array(dev, "st,adc-channels", chans, num_se);
2071 dev_err(&indio_dev->dev, "Failed to get st,adc-channels %d\n", ret);
2077 dev_err(&indio_dev->dev, "Invalid channel %d\n",
2085 dev_err(&indio_dev->dev, "channel %d misconfigured\n",
2097 ret = device_property_read_u32_array(dev, "st,min-sample-time-nsecs",
2134 dev_warn(&indio_dev->dev,
2139 dev_warn(&indio_dev->dev,
2144 dev_warn(&indio_dev->dev,
2149 dev_warn(&indio_dev->dev,
2154 dev_warn(&indio_dev->dev,
2165 ret = nvmem_cell_read_u16(&indio_dev->dev, "vrefint", &vrefint);
2167 return dev_err_probe(indio_dev->dev.parent, ret,
2171 dev_dbg(&indio_dev->dev, "vrefint calibration not found. Skip vrefint channel\n");
2174 dev_dbg(&indio_dev->dev, "Null vrefint calibration value. Skip vrefint channel\n");
2196 device_for_each_child_node(&indio_dev->dev, child) {
2199 dev_err(&indio_dev->dev, "Missing channel index %d\n", ret);
2207 dev_err(&indio_dev->dev, "Label %s exceeds %d characters\n",
2219 dev_err(&indio_dev->dev, "Invalid label %d\n", ret);
2224 dev_err(&indio_dev->dev, "Invalid channel %d\n", val);
2235 dev_err(&indio_dev->dev, "Invalid channel in%d-in%d\n",
2240 dev_err(&indio_dev->dev, "Invalid diff-channels property %d\n", ret);
2251 dev_err(&indio_dev->dev, "Invalid st,min-sample-time-ns property %d\n",
2282 num_channels = device_get_child_node_count(&indio_dev->dev);
2289 dev_err(indio_dev->dev.parent, "No channel found\n");
2299 dev_err(&indio_dev->dev, "Channel number [%d] exceeds %d\n",
2307 channels = devm_kcalloc(&indio_dev->dev, num_channels,
2340 static int stm32_adc_dma_request(struct device *dev, struct iio_dev *indio_dev)
2346 adc->dma_chan = dma_request_chan(dev, "rx");
2350 return dev_err_probe(dev, ret,
2358 adc->rx_buf = dma_alloc_coherent(adc->dma_chan->device->dev,
2379 dma_free_coherent(adc->dma_chan->device->dev, STM32_DMA_BUFFER_SIZE,
2390 struct device *dev = &pdev->dev;
2396 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc));
2401 adc->common = dev_get_drvdata(pdev->dev.parent);
2404 adc->cfg = device_get_match_data(dev);
2406 indio_dev->name = dev_name(&pdev->dev);
2407 device_set_node(&indio_dev->dev, dev_fwnode(&pdev->dev));
2413 ret = device_property_read_u32(dev, "reg", &adc->offset);
2415 dev_err(&pdev->dev, "missing reg property\n");
2423 ret = devm_request_threaded_irq(&pdev->dev, adc->irq, stm32_adc_isr,
2427 dev_err(&pdev->dev, "failed to request IRQ\n");
2431 adc->clk = devm_clk_get(&pdev->dev, NULL);
2437 dev_err(&pdev->dev, "Can't get clock\n");
2446 ret = stm32_adc_dma_request(dev, indio_dev);
2467 dev_err(&pdev->dev, "buffer setup failed\n");
2472 pm_runtime_get_noresume(dev);
2473 pm_runtime_set_active(dev);
2474 pm_runtime_set_autosuspend_delay(dev, STM32_ADC_HW_STOP_DELAY_MS);
2475 pm_runtime_use_autosuspend(dev);
2476 pm_runtime_enable(dev);
2478 ret = stm32_adc_hw_start(dev);
2484 dev_err(&pdev->dev, "iio dev register failed\n");
2488 pm_runtime_mark_last_busy(dev);
2489 pm_runtime_put_autosuspend(dev);
2497 stm32_adc_hw_stop(dev);
2500 pm_runtime_disable(dev);
2501 pm_runtime_set_suspended(dev);
2502 pm_runtime_put_noidle(dev);
2507 dma_free_coherent(adc->dma_chan->device->dev,
2521 pm_runtime_get_sync(&pdev->dev);
2524 stm32_adc_hw_stop(&pdev->dev);
2525 pm_runtime_disable(&pdev->dev);
2526 pm_runtime_set_suspended(&pdev->dev);
2527 pm_runtime_put_noidle(&pdev->dev);
2530 dma_free_coherent(adc->dma_chan->device->dev,
2539 static int stm32_adc_suspend(struct device *dev)
2541 struct iio_dev *indio_dev = dev_get_drvdata(dev);
2546 return pm_runtime_force_suspend(dev);
2549 static int stm32_adc_resume(struct device *dev)
2551 struct iio_dev *indio_dev = dev_get_drvdata(dev);
2554 ret = pm_runtime_force_resume(dev);
2569 static int stm32_adc_runtime_suspend(struct device *dev)
2571 return stm32_adc_hw_stop(dev);
2574 static int stm32_adc_runtime_resume(struct device *dev)
2576 return stm32_adc_hw_start(dev);