Lines Matching refs:val
33 #define MCP3911_GAIN_VAL(ch, val) ((val << 3 * ch) & MCP3911_GAIN_MASK(ch))
87 static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len)
92 ret = spi_write_then_read(adc->spi, ®, 1, val, len);
96 be32_to_cpus(val);
97 *val >>= ((4 - len) * 8);
98 dev_dbg(&adc->spi->dev, "reading 0x%x from register 0x%lx\n", *val,
103 static int mcp3911_write(struct mcp3911 *adc, u8 reg, u32 val, u8 len)
105 dev_dbg(&adc->spi->dev, "writing 0x%x to register 0x%x\n", val, reg);
107 val <<= (3 - len) * 8;
108 cpu_to_be32s(&val);
109 val |= MCP3911_REG_WRITE(reg, adc->dev_addr);
111 return spi_write(adc->spi, &val, len + 1);
115 u32 val, u8 len)
124 val &= mask;
125 val |= tmp & ~mask;
126 return mcp3911_write(adc, reg, val, len);
165 struct iio_chan_spec const *channel, int *val,
175 MCP3911_CHANNEL(channel->channel), val, 3);
179 *val = sign_extend32(*val, 23);
186 MCP3911_OFFCAL(channel->channel), val, 3);
193 ret = mcp3911_read(adc, MCP3911_REG_CONFIG, val, 2);
197 *val = FIELD_GET(MCP3911_CONFIG_OSR, *val);
198 *val = 32 << *val;
203 *val = mcp3911_scale_table[ilog2(adc->gain[channel->channel])][0];
215 struct iio_chan_spec const *channel, int val,
225 if (val == mcp3911_scale_table[i][0] &&
242 ret = mcp3911_write(adc, MCP3911_OFFCAL(channel->channel), val,
255 if (val == mcp3911_osr_table[i]) {
256 val = FIELD_PREP(MCP3911_CONFIG_OSR, i);
258 val, 2);