Lines Matching refs:ret
185 int ret;
188 ret = regmap_bulk_read(st->regmap, reg, &st->scan.data, 3);
189 if (ret)
190 return ret;
232 int ret;
234 ret = max11410_read_reg(state, MAX11410_REG_FILTER, &val);
235 if (ret)
236 return ret;
264 int ret;
266 ret = kstrtobool(buf, &enable);
267 if (ret)
268 return ret;
285 ret = regmap_clear_bits(state->regmap, MAX11410_REG_FILTER,
288 ret = regmap_set_bits(state->regmap, MAX11410_REG_FILTER,
291 if (ret)
292 return ret;
303 int ret, reg, rate, filter;
305 ret = regmap_read(state->regmap, MAX11410_REG_FILTER, ®);
306 if (ret)
307 return ret;
357 int ret;
360 ret = max11410_set_input_mux(st, chan->channel, chan->channel2);
362 ret = max11410_set_input_mux(st, chan->channel,
365 if (ret)
366 return ret;
372 ret = regmap_update_bits(st->regmap, MAX11410_REG_CTRL,
377 if (ret)
378 return ret;
382 ret = regmap_write(st->regmap, MAX11410_REG_PGA, regval);
383 if (ret)
384 return ret;
395 int val, ret;
397 ret = max11410_configure_channel(st, chan);
398 if (ret)
399 return ret;
405 ret = max11410_write_reg(st, MAX11410_REG_CONV_START,
407 if (ret)
408 return ret;
412 ret = wait_for_completion_timeout(&st->completion,
414 if (!ret)
420 ret = read_poll_timeout(max11410_read_reg, ret2,
424 if (ret)
425 return ret;
459 int ret, reg_val, filter, rate;
474 ret = iio_device_claim_direct_mode(indio_dev);
475 if (ret)
476 return ret;
480 ret = max11410_sample(state, ®_val, chan);
486 if (ret)
487 return ret;
493 ret = regmap_read(state->regmap, MAX11410_REG_FILTER, ®_val);
494 if (ret)
495 return ret;
515 int i, ret, reg_val, filter, gain;
528 ret = iio_device_claim_direct_mode(indio_dev);
529 if (ret)
530 return ret;
543 ret = iio_device_claim_direct_mode(indio_dev);
544 if (ret)
545 return ret;
549 ret = regmap_read(st->regmap, MAX11410_REG_FILTER, ®_val);
550 if (ret)
561 ret = -EINVAL;
565 ret = regmap_write_bits(st->regmap, MAX11410_REG_FILTER,
572 return ret;
585 int ret, reg_val, filter;
589 ret = regmap_read(st->regmap, MAX11410_REG_FILTER, ®_val);
590 if (ret)
591 return ret;
627 int ret;
629 ret = max11410_read_reg(st, MAX11410_REG_DATA0, &st->scan.data);
630 if (ret) {
647 int scan_ch, ret;
651 ret = max11410_configure_channel(st, &indio_dev->channels[scan_ch]);
652 if (ret)
653 return ret;
705 int ret, i;
726 ret = fwnode_property_read_u32_array(child,
733 ret = fwnode_property_read_u32(child, "reg", &inputs[0]);
738 if (ret) {
740 return ret;
838 int ret;
847 ret = regulator_enable(reg);
848 if (ret)
849 return dev_err_probe(dev, ret,
858 int ret, ret2, val;
860 ret = max11410_write_reg(st, MAX11410_REG_CAL_START, cal_type);
861 if (ret)
862 return ret;
865 ret = read_poll_timeout(max11410_read_reg, ret2,
869 if (ret)
870 return ret;
877 int ret, i;
879 ret = regmap_write_bits(st->regmap, MAX11410_REG_FILTER,
883 if (ret)
884 return ret;
886 ret = max11410_calibrate(st, MAX11410_CAL_START_SELF);
887 if (ret)
888 return ret;
890 ret = regmap_write_bits(st->regmap, MAX11410_REG_PGA,
894 if (ret)
895 return ret;
899 ret = regmap_write_bits(st->regmap, MAX11410_REG_PGA,
901 if (ret)
902 return ret;
904 ret = max11410_calibrate(st, MAX11410_CAL_START_PGA);
905 if (ret)
906 return ret;
910 ret = regmap_write_bits(st->regmap, MAX11410_REG_PGA,
912 if (ret)
913 return ret;
915 ret = regmap_write_bits(st->regmap, MAX11410_REG_FILTER,
917 if (ret)
918 return ret;
933 int ret, irqs[2];
954 ret = max11410_init_vref(dev, &st->avdd, "avdd");
955 if (ret)
956 return ret;
959 ret = max11410_init_vref(dev, &st->vrefp[i], vrefp_regs[i]);
960 if (ret)
961 return ret;
963 ret = max11410_init_vref(dev, &st->vrefn[i], vrefn_regs[i]);
964 if (ret)
965 return ret;
972 ret = max11410_parse_channels(st, indio_dev);
973 if (ret)
974 return ret;
981 ret = regmap_write(st->regmap, MAX11410_REG_GPIO_CTRL(0),
985 ret = regmap_write(st->regmap, MAX11410_REG_GPIO_CTRL(1),
992 if (ret)
993 return ret;
995 ret = regmap_set_bits(st->regmap, MAX11410_REG_CTRL,
997 if (ret)
998 return ret;
1000 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
1003 if (ret)
1004 return ret;
1014 ret = devm_iio_trigger_register(dev, st->trig);
1015 if (ret)
1016 return ret;
1018 ret = devm_request_threaded_irq(dev, st->irq, NULL,
1022 if (ret)
1023 return ret;
1026 ret = max11410_self_calibrate(st);
1027 if (ret)
1028 return dev_err_probe(dev, ret,