Lines Matching refs:st
52 static int ad7606_reset(struct ad7606_state *st)
54 if (st->gpio_reset) {
55 gpiod_set_value(st->gpio_reset, 1);
57 gpiod_set_value(st->gpio_reset, 0);
69 struct ad7606_state *st = iio_priv(indio_dev);
72 mutex_lock(&st->lock);
74 ret = st->bops->reg_read(st, reg);
80 ret = st->bops->reg_write(st, reg, writeval);
83 mutex_unlock(&st->lock);
87 static int ad7606_read_samples(struct ad7606_state *st)
89 unsigned int num = st->chip_info->num_channels - 1;
90 u16 *data = st->data;
103 if (st->gpio_frstdata) {
104 ret = st->bops->read_block(st->dev, 1, data);
108 if (!gpiod_get_value(st->gpio_frstdata)) {
109 ad7606_reset(st);
117 return st->bops->read_block(st->dev, num, data);
124 struct ad7606_state *st = iio_priv(indio_dev);
127 mutex_lock(&st->lock);
129 ret = ad7606_read_samples(st);
131 iio_push_to_buffers_with_timestamp(indio_dev, st->data,
136 gpiod_set_value(st->gpio_convst, 1);
138 mutex_unlock(&st->lock);
145 struct ad7606_state *st = iio_priv(indio_dev);
148 gpiod_set_value(st->gpio_convst, 1);
149 ret = wait_for_completion_timeout(&st->completion,
156 ret = ad7606_read_samples(st);
158 ret = st->data[ch];
161 gpiod_set_value(st->gpio_convst, 0);
173 struct ad7606_state *st = iio_priv(indio_dev);
189 if (st->sw_mode_en)
192 *val2 = st->scale_avail[st->range[ch]];
195 *val = st->oversampling;
221 struct ad7606_state *st = iio_priv(indio_dev);
223 return ad7606_show_avail(buf, st->scale_avail, st->num_scales, true);
230 struct ad7606_state *st = iio_priv(indio_dev);
232 gpiod_set_value(st->gpio_range, val);
239 struct ad7606_state *st = iio_priv(indio_dev);
244 gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc,
245 st->gpio_os->info, values);
248 if (st->chip_info->os_req_reset)
249 ad7606_reset(st);
260 struct ad7606_state *st = iio_priv(indio_dev);
265 mutex_lock(&st->lock);
266 i = find_closest(val2, st->scale_avail, st->num_scales);
267 if (st->sw_mode_en)
269 ret = st->write_scale(indio_dev, ch, i);
271 mutex_unlock(&st->lock);
274 st->range[ch] = i;
275 mutex_unlock(&st->lock);
281 i = find_closest(val, st->oversampling_avail,
282 st->num_os_ratios);
283 mutex_lock(&st->lock);
284 ret = st->write_os(indio_dev, i);
286 mutex_unlock(&st->lock);
289 st->oversampling = st->oversampling_avail[i];
290 mutex_unlock(&st->lock);
303 struct ad7606_state *st = iio_priv(indio_dev);
305 return ad7606_show_avail(buf, st->oversampling_avail,
306 st->num_os_ratios, false);
430 static int ad7606_request_gpios(struct ad7606_state *st)
432 struct device *dev = st->dev;
434 st->gpio_convst = devm_gpiod_get(dev, "adi,conversion-start",
436 if (IS_ERR(st->gpio_convst))
437 return PTR_ERR(st->gpio_convst);
439 st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
440 if (IS_ERR(st->gpio_reset))
441 return PTR_ERR(st->gpio_reset);
443 st->gpio_range = devm_gpiod_get_optional(dev, "adi,range",
445 if (IS_ERR(st->gpio_range))
446 return PTR_ERR(st->gpio_range);
448 st->gpio_standby = devm_gpiod_get_optional(dev, "standby",
450 if (IS_ERR(st->gpio_standby))
451 return PTR_ERR(st->gpio_standby);
453 st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data",
455 if (IS_ERR(st->gpio_frstdata))
456 return PTR_ERR(st->gpio_frstdata);
458 if (!st->chip_info->oversampling_num)
461 st->gpio_os = devm_gpiod_get_array_optional(dev,
464 return PTR_ERR_OR_ZERO(st->gpio_os);
476 struct ad7606_state *st = iio_priv(indio_dev);
479 gpiod_set_value(st->gpio_convst, 0);
480 iio_trigger_poll_nested(st->trig);
482 complete(&st->completion);
491 struct ad7606_state *st = iio_priv(indio_dev);
493 if (st->trig != trig)
501 struct ad7606_state *st = iio_priv(indio_dev);
503 gpiod_set_value(st->gpio_convst, 1);
510 struct ad7606_state *st = iio_priv(indio_dev);
512 gpiod_set_value(st->gpio_convst, 0);
564 struct ad7606_state *st;
568 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
572 st = iio_priv(indio_dev);
575 st->dev = dev;
576 mutex_init(&st->lock);
577 st->bops = bops;
578 st->base_address = base_address;
580 st->range[0] = 0;
581 st->oversampling = 1;
582 st->scale_avail = ad7606_scale_avail;
583 st->num_scales = ARRAY_SIZE(ad7606_scale_avail);
590 st->chip_info = &ad7606_chip_info_tbl[id];
592 if (st->chip_info->oversampling_num) {
593 st->oversampling_avail = st->chip_info->oversampling_avail;
594 st->num_os_ratios = st->chip_info->oversampling_num;
597 ret = ad7606_request_gpios(st);
601 if (st->gpio_os) {
602 if (st->gpio_range)
607 if (st->gpio_range)
614 indio_dev->channels = st->chip_info->channels;
615 indio_dev->num_channels = st->chip_info->num_channels;
617 init_completion(&st->completion);
619 ret = ad7606_reset(st);
621 dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n");
624 if (st->chip_info->init_delay_ms) {
625 if (msleep_interruptible(st->chip_info->init_delay_ms))
629 st->write_scale = ad7606_write_scale_hw;
630 st->write_os = ad7606_write_os_hw;
632 if (st->bops->sw_mode_config)
633 st->sw_mode_en = device_property_present(st->dev,
636 if (st->sw_mode_en) {
638 st->scale_avail = ad7616_sw_scale_avail;
639 st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail);
642 memset32(st->range, 2, ARRAY_SIZE(st->range));
645 ret = st->bops->sw_mode_config(indio_dev);
650 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
653 if (!st->trig)
656 st->trig->ops = &ad7606_trigger_ops;
657 iio_trigger_set_drvdata(st->trig, indio_dev);
658 ret = devm_iio_trigger_register(dev, st->trig);
662 indio_dev->trig = iio_trigger_get(st->trig);
688 struct ad7606_state *st = iio_priv(indio_dev);
690 if (st->gpio_standby) {
691 gpiod_set_value(st->gpio_range, 1);
692 gpiod_set_value(st->gpio_standby, 0);
701 struct ad7606_state *st = iio_priv(indio_dev);
703 if (st->gpio_standby) {
704 gpiod_set_value(st->gpio_range, st->range[0]);
705 gpiod_set_value(st->gpio_standby, 1);
706 ad7606_reset(st);