Lines Matching refs:clock_sel
189 u8 clock_sel;
366 unsigned int clock_sel;
368 clock_sel = AD7192_CLK_INT;
373 clock_sel = AD7192_CLK_INT_CO;
376 clock_sel = AD7192_CLK_EXT_MCLK1_2;
378 clock_sel = AD7192_CLK_EXT_MCLK2;
381 return clock_sel;
410 AD7192_MODE_CLKSRC(st->clock_sel) |
1068 st->clock_sel = ad7192_of_clock_select(st);
1070 if (st->clock_sel == AD7192_CLK_EXT_MCLK1_2 ||
1071 st->clock_sel == AD7192_CLK_EXT_MCLK2) {