Lines Matching defs:mode
185 u32 mode;
203 unsigned int mode)
207 st->syscalib_mode[chan->channel] = mode;
282 enum ad_sigma_delta_mode mode)
286 st->mode &= ~AD7192_MODE_SEL_MASK;
287 st->mode |= AD7192_MODE_SEL(mode);
289 return ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode);
295 unsigned int mode = st->mode;
298 mode &= ~AD7192_MODE_STA_MASK;
299 mode |= AD7192_MODE_STA(append);
301 ret = ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, mode);
305 st->mode = mode;
409 st->mode = AD7192_MODE_SEL(AD7192_MODE_IDLE) |
417 st->mode |= AD7192_MODE_REJ60;
443 ret = ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode);
541 AD7192_SYNC4_FILTER * AD7192_MODE_RATE(st->mode));
545 AD7192_SYNC3_FILTER * AD7192_MODE_RATE(st->mode));
548 fadc = DIV_ROUND_CLOSEST(st->fclk, AD7192_MODE_RATE(st->mode));
633 st->mode &= ~AD7192_MODE_SINC3;
639 st->mode |= AD7192_MODE_SINC3;
645 st->mode &= ~AD7192_MODE_SINC3;
651 st->mode |= AD7192_MODE_SINC3;
657 ret = ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode);
669 st->f_order * AD7192_MODE_RATE(st->mode));
673 if (st->mode & AD7192_MODE_SINC3)
717 (st->f_order * 1024 * AD7192_MODE_RATE(st->mode));
773 st->mode &= ~AD7192_MODE_RATE(-1);
774 st->mode |= AD7192_MODE_RATE(div);
775 ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode);