Lines Matching defs:xiic_setreg32
276 static inline void xiic_setreg32(struct xiic_i2c *i2c, int reg, int value)
299 xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier & ~mask);
306 xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier | mask);
313 xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask);
414 xiic_setreg32(i2c, XIIC_THIGH_REG_OFFSET, reg_val - 1);
417 xiic_setreg32(i2c, XIIC_TLOW_REG_OFFSET, reg_val - 1);
421 xiic_setreg32(i2c, XIIC_TSUSTA_REG_OFFSET, reg_val - 1);
425 xiic_setreg32(i2c, XIIC_TSUSTO_REG_OFFSET, reg_val - 1);
429 xiic_setreg32(i2c, XIIC_THDSTA_REG_OFFSET, reg_val - 1);
433 xiic_setreg32(i2c, XIIC_TSUDAT_REG_OFFSET, reg_val - 1);
437 xiic_setreg32(i2c, XIIC_TBUF_REG_OFFSET, reg_val - 1);
440 xiic_setreg32(i2c, XIIC_THDDAT_REG_OFFSET, 1);
449 xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
470 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK);
481 xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
828 xiic_setreg32(i2c, XIIC_IISR_OFFSET, clr);
996 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK);
1298 xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK);