Lines Matching defs:reg_val
375 u32 reg_val;
410 reg_val = (DIV_ROUND_UP(i2c->input_clk, 2 * i2c->i2c_clk)) - 7;
411 if (reg_val == 0)
414 xiic_setreg32(i2c, XIIC_THIGH_REG_OFFSET, reg_val - 1);
417 xiic_setreg32(i2c, XIIC_TLOW_REG_OFFSET, reg_val - 1);
420 reg_val = (timing_reg_values[index].tsusta * clk_in_mhz) / 1000;
421 xiic_setreg32(i2c, XIIC_TSUSTA_REG_OFFSET, reg_val - 1);
424 reg_val = (timing_reg_values[index].tsusto * clk_in_mhz) / 1000;
425 xiic_setreg32(i2c, XIIC_TSUSTO_REG_OFFSET, reg_val - 1);
428 reg_val = (timing_reg_values[index].thdsta * clk_in_mhz) / 1000;
429 xiic_setreg32(i2c, XIIC_THDSTA_REG_OFFSET, reg_val - 1);
432 reg_val = (timing_reg_values[index].tsudat * clk_in_mhz) / 1000;
433 xiic_setreg32(i2c, XIIC_TSUDAT_REG_OFFSET, reg_val - 1);
436 reg_val = (timing_reg_values[index].tbuf * clk_in_mhz) / 1000;
437 xiic_setreg32(i2c, XIIC_TBUF_REG_OFFSET, reg_val - 1);