Lines Matching refs:dma
315 * @dma: dma data
316 * @use_dma: boolean to know if dma is used in the current transfer
347 struct stm32_i2c_dma *dma;
729 struct stm32_i2c_dma *dma = i2c_dev->dma;
730 struct device *dev = dma->chan_using->device->dev;
733 dma_unmap_single(dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir);
734 complete(&dma->dma_complete);
918 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN) {
919 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma,
1085 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN) {
1086 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma,
1171 * dma as we don't know in advance how many data will be received
1177 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN &&
1180 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma,
1495 struct stm32_i2c_dma *dma = i2c_dev->dma;
1523 dmaengine_terminate_async(dma->chan_using);
1578 struct stm32_i2c_dma *dma = i2c_dev->dma;
1583 * Wait for dma transfer completion before sending next message or
1586 ret = wait_for_completion_timeout(&i2c_dev->dma->dma_complete, HZ);
1590 dmaengine_terminate_async(dma->chan_using);
1618 struct stm32_i2c_dma *dma = i2c_dev->dma;
1664 /* Disable dma */
1667 dmaengine_terminate_async(dma->chan_using);
1681 struct stm32_i2c_dma *dma = i2c_dev->dma;
1705 dmaengine_synchronize(dma->chan_using);
1721 dmaengine_terminate_sync(dma->chan_using);
1740 struct stm32_i2c_dma *dma = i2c_dev->dma;
1767 dmaengine_synchronize(dma->chan_using);
1782 dmaengine_terminate_sync(dma->chan_using);
2215 i2c_dev->dma = stm32_i2c_dma_request(i2c_dev->dev, phy_addr,
2218 if (IS_ERR(i2c_dev->dma)) {
2219 ret = PTR_ERR(i2c_dev->dma);
2224 i2c_dev->dma = NULL;
2301 if (i2c_dev->dma) {
2302 stm32_i2c_dma_free(i2c_dev->dma);
2303 i2c_dev->dma = NULL;
2339 if (i2c_dev->dma) {
2340 stm32_i2c_dma_free(i2c_dev->dma);
2341 i2c_dev->dma = NULL;