Lines Matching defs:i2c_dev
429 static void stm32f7_i2c_disable_irq(struct stm32f7_i2c_dev *i2c_dev, u32 mask)
431 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, mask);
446 static int stm32f7_i2c_compute_timing(struct stm32f7_i2c_dev *i2c_dev,
470 dev_err(i2c_dev->dev, "speed out of bound {%d}\n",
477 dev_err(i2c_dev->dev,
484 i2c_dev->dnf = DIV_ROUND_CLOSEST(i2c_dev->dnf_dt, i2cclk);
485 if (i2c_dev->dnf > STM32F7_I2C_DNF_MAX) {
486 dev_err(i2c_dev->dev,
488 i2c_dev->dnf * i2cclk, STM32F7_I2C_DNF_MAX * i2cclk);
494 (i2c_dev->analog_filter ?
497 (i2c_dev->analog_filter ?
499 dnf_delay = i2c_dev->dnf * i2cclk;
502 af_delay_min - (i2c_dev->dnf + 3) * i2cclk;
505 af_delay_max - (i2c_dev->dnf + 4) * i2cclk;
514 dev_dbg(i2c_dev->dev, "SDADEL(min/max): %i/%i, SCLDEL(Min): %i\n",
555 dev_err(i2c_dev->dev, "no Prescaler solution\n");
612 dev_err(i2c_dev->dev, "no solution at all\n");
623 dev_dbg(i2c_dev->dev,
650 static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev,
657 t->scl_rise_ns = i2c_dev->setup.rise_time;
658 t->scl_fall_ns = i2c_dev->setup.fall_time;
660 i2c_parse_fw_timings(i2c_dev->dev, t, false);
663 dev_err(i2c_dev->dev, "Invalid bus speed (%i>%i)\n",
669 i2c_dev->setup.rise_time = t->scl_rise_ns;
670 i2c_dev->setup.fall_time = t->scl_fall_ns;
671 i2c_dev->dnf_dt = t->digital_filter_width_ns;
672 setup->clock_src = clk_get_rate(i2c_dev->clk);
675 dev_err(i2c_dev->dev, "clock rate is 0\n");
679 if (!of_property_read_bool(i2c_dev->dev->of_node, "i2c-digital-filter"))
680 i2c_dev->dnf_dt = STM32F7_I2C_DNF_DEFAULT;
683 ret = stm32f7_i2c_compute_timing(i2c_dev, setup,
684 &i2c_dev->timing);
686 dev_err(i2c_dev->dev,
692 dev_warn(i2c_dev->dev,
699 dev_err(i2c_dev->dev, "Impossible to compute I2C timings.\n");
703 i2c_dev->analog_filter = of_property_read_bool(i2c_dev->dev->of_node,
706 dev_dbg(i2c_dev->dev, "I2C Speed(%i), Clk Source(%i)\n",
708 dev_dbg(i2c_dev->dev, "I2C Rise(%i) and Fall(%i) Time\n",
710 dev_dbg(i2c_dev->dev, "I2C Analog Filter(%s), DNF(%i)\n",
711 (i2c_dev->analog_filter ? "On" : "Off"), i2c_dev->dnf);
713 i2c_dev->bus_rate = setup->speed_freq;
718 static void stm32f7_i2c_disable_dma_req(struct stm32f7_i2c_dev *i2c_dev)
720 void __iomem *base = i2c_dev->base;
728 struct stm32f7_i2c_dev *i2c_dev = (struct stm32f7_i2c_dev *)arg;
729 struct stm32_i2c_dma *dma = i2c_dev->dma;
732 stm32f7_i2c_disable_dma_req(i2c_dev);
737 static void stm32f7_i2c_hw_config(struct stm32f7_i2c_dev *i2c_dev)
739 struct stm32f7_i2c_timings *t = &i2c_dev->timing;
748 writel_relaxed(timing, i2c_dev->base + STM32F7_I2C_TIMINGR);
751 if (i2c_dev->analog_filter)
752 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1,
755 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1,
759 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1,
761 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1,
762 STM32F7_I2C_CR1_DNF(i2c_dev->dnf));
764 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1,
768 static void stm32f7_i2c_write_tx_data(struct stm32f7_i2c_dev *i2c_dev)
770 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
771 void __iomem *base = i2c_dev->base;
779 static void stm32f7_i2c_read_rx_data(struct stm32f7_i2c_dev *i2c_dev)
781 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
782 void __iomem *base = i2c_dev->base;
793 static void stm32f7_i2c_reload(struct stm32f7_i2c_dev *i2c_dev)
795 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
798 if (i2c_dev->use_dma)
801 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);
811 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2);
814 static void stm32f7_i2c_smbus_reload(struct stm32f7_i2c_dev *i2c_dev)
816 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
824 stm32f7_i2c_read_rx_data(i2c_dev);
831 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);
834 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2);
839 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(i2c_adap);
841 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1,
844 stm32f7_i2c_hw_config(i2c_dev);
847 static int stm32f7_i2c_wait_free_bus(struct stm32f7_i2c_dev *i2c_dev)
852 ret = readl_relaxed_poll_timeout(i2c_dev->base + STM32F7_I2C_ISR,
859 stm32f7_i2c_release_bus(&i2c_dev->adap);
864 static void stm32f7_i2c_xfer_msg(struct stm32f7_i2c_dev *i2c_dev,
867 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
868 void __iomem *base = i2c_dev->base;
876 f7_msg->stop = (i2c_dev->msg_id >= i2c_dev->msg_num - 1);
878 reinit_completion(&i2c_dev->complete);
917 i2c_dev->use_dma = false;
918 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN) {
919 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma,
923 i2c_dev);
925 i2c_dev->use_dma = true;
927 dev_warn(i2c_dev->dev, "can't use DMA\n");
930 if (!i2c_dev->use_dma) {
945 i2c_dev->master_mode = true;
952 static int stm32f7_i2c_smbus_xfer_msg(struct stm32f7_i2c_dev *i2c_dev,
956 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
957 struct device *dev = i2c_dev->dev;
958 void __iomem *base = i2c_dev->base;
963 reinit_completion(&i2c_dev->complete);
1084 i2c_dev->use_dma = false;
1085 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN) {
1086 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma,
1090 i2c_dev);
1092 i2c_dev->use_dma = true;
1094 dev_warn(i2c_dev->dev, "can't use DMA\n");
1097 if (!i2c_dev->use_dma) {
1112 i2c_dev->master_mode = true;
1121 static void stm32f7_i2c_smbus_rep_start(struct stm32f7_i2c_dev *i2c_dev)
1123 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
1124 void __iomem *base = i2c_dev->base;
1176 i2c_dev->use_dma = false;
1177 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN &&
1180 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma,
1184 i2c_dev);
1187 i2c_dev->use_dma = true;
1189 dev_warn(i2c_dev->dev, "can't use DMA\n");
1192 if (!i2c_dev->use_dma)
1205 static int stm32f7_i2c_smbus_check_pec(struct stm32f7_i2c_dev *i2c_dev)
1207 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
1210 internal_pec = readl_relaxed(i2c_dev->base + STM32F7_I2C_PECR);
1227 dev_err(i2c_dev->dev, "Unsupported smbus protocol for PEC\n");
1232 dev_err(i2c_dev->dev, "Bad PEC 0x%02x vs. 0x%02x\n",
1266 static void stm32f7_i2c_slave_start(struct stm32f7_i2c_dev *i2c_dev)
1268 struct i2c_client *slave = i2c_dev->slave_running;
1269 void __iomem *base = i2c_dev->base;
1273 if (i2c_dev->slave_dir) {
1314 static void stm32f7_i2c_slave_addr(struct stm32f7_i2c_dev *i2c_dev)
1316 void __iomem *base = i2c_dev->base;
1320 isr = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR);
1325 if (stm32f7_i2c_is_addr_match(i2c_dev->slave[i], addcode)) {
1326 i2c_dev->slave_running = i2c_dev->slave[i];
1327 i2c_dev->slave_dir = dir;
1330 stm32f7_i2c_slave_start(i2c_dev);
1340 static int stm32f7_i2c_get_slave_id(struct stm32f7_i2c_dev *i2c_dev,
1346 if (i2c_dev->slave[i] == slave) {
1352 dev_err(i2c_dev->dev, "Slave 0x%x not registered\n", slave->addr);
1357 static int stm32f7_i2c_get_free_slave_id(struct stm32f7_i2c_dev *i2c_dev,
1360 struct device *dev = i2c_dev->dev;
1368 if (i2c_dev->smbus_mode && (slave->addr == 0x08)) {
1369 if (i2c_dev->slave[STM32F7_SLAVE_HOSTNOTIFY])
1379 if (!i2c_dev->slave[i]) {
1391 static bool stm32f7_i2c_is_slave_registered(struct stm32f7_i2c_dev *i2c_dev)
1396 if (i2c_dev->slave[i])
1403 static bool stm32f7_i2c_is_slave_busy(struct stm32f7_i2c_dev *i2c_dev)
1409 if (i2c_dev->slave[i])
1416 static irqreturn_t stm32f7_i2c_slave_isr_event(struct stm32f7_i2c_dev *i2c_dev)
1418 void __iomem *base = i2c_dev->base;
1423 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR);
1427 i2c_slave_event(i2c_dev->slave_running,
1441 val = readb_relaxed(i2c_dev->base + STM32F7_I2C_RXDR);
1442 ret = i2c_slave_event(i2c_dev->slave_running,
1446 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);
1448 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2);
1457 dev_dbg(i2c_dev->dev, "<%s>: Receive NACK\n", __func__);
1464 stm32f7_i2c_disable_irq(i2c_dev, STM32F7_I2C_XFER_IRQ_MASK);
1466 if (i2c_dev->slave_dir) {
1479 i2c_slave_event(i2c_dev->slave_running, I2C_SLAVE_STOP, &val);
1481 i2c_dev->slave_running = NULL;
1486 stm32f7_i2c_slave_addr(i2c_dev);
1493 struct stm32f7_i2c_dev *i2c_dev = data;
1494 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
1495 struct stm32_i2c_dma *dma = i2c_dev->dma;
1496 void __iomem *base = i2c_dev->base;
1501 if (!i2c_dev->master_mode) {
1502 ret = stm32f7_i2c_slave_isr_event(i2c_dev);
1506 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR);
1510 stm32f7_i2c_write_tx_data(i2c_dev);
1514 stm32f7_i2c_read_rx_data(i2c_dev);
1518 dev_dbg(i2c_dev->dev, "<%s>: Receive NACK (addr %x)\n",
1521 if (i2c_dev->use_dma) {
1522 stm32f7_i2c_disable_dma_req(i2c_dev);
1531 if (stm32f7_i2c_is_slave_registered(i2c_dev))
1535 stm32f7_i2c_disable_irq(i2c_dev, mask);
1540 if (i2c_dev->use_dma && !f7_msg->result) {
1543 i2c_dev->master_mode = false;
1544 complete(&i2c_dev->complete);
1553 } else if (i2c_dev->use_dma && !f7_msg->result) {
1556 stm32f7_i2c_smbus_rep_start(i2c_dev);
1558 i2c_dev->msg_id++;
1559 i2c_dev->msg++;
1560 stm32f7_i2c_xfer_msg(i2c_dev, i2c_dev->msg);
1566 stm32f7_i2c_smbus_reload(i2c_dev);
1568 stm32f7_i2c_reload(i2c_dev);
1576 struct stm32f7_i2c_dev *i2c_dev = data;
1577 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
1578 struct stm32_i2c_dma *dma = i2c_dev->dma;
1586 ret = wait_for_completion_timeout(&i2c_dev->dma->dma_complete, HZ);
1588 dev_dbg(i2c_dev->dev, "<%s>: Timed out\n", __func__);
1589 stm32f7_i2c_disable_dma_req(i2c_dev);
1594 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR);
1598 stm32f7_i2c_smbus_rep_start(i2c_dev);
1600 i2c_dev->msg_id++;
1601 i2c_dev->msg++;
1602 stm32f7_i2c_xfer_msg(i2c_dev, i2c_dev->msg);
1605 i2c_dev->master_mode = false;
1606 complete(&i2c_dev->complete);
1614 struct stm32f7_i2c_dev *i2c_dev = data;
1615 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
1616 void __iomem *base = i2c_dev->base;
1617 struct device *dev = i2c_dev->dev;
1618 struct stm32_i2c_dma *dma = i2c_dev->dma;
1621 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR);
1628 stm32f7_i2c_release_bus(&i2c_dev->adap);
1650 i2c_handle_smbus_alert(i2c_dev->alert->ara);
1654 if (!i2c_dev->slave_running) {
1657 if (stm32f7_i2c_is_slave_registered(i2c_dev))
1661 stm32f7_i2c_disable_irq(i2c_dev, mask);
1665 if (i2c_dev->use_dma) {
1666 stm32f7_i2c_disable_dma_req(i2c_dev);
1670 i2c_dev->master_mode = false;
1671 complete(&i2c_dev->complete);
1679 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(i2c_adap);
1680 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
1681 struct stm32_i2c_dma *dma = i2c_dev->dma;
1685 i2c_dev->msg = msgs;
1686 i2c_dev->msg_num = num;
1687 i2c_dev->msg_id = 0;
1690 ret = pm_runtime_resume_and_get(i2c_dev->dev);
1694 ret = stm32f7_i2c_wait_free_bus(i2c_dev);
1698 stm32f7_i2c_xfer_msg(i2c_dev, msgs);
1700 time_left = wait_for_completion_timeout(&i2c_dev->complete,
1701 i2c_dev->adap.timeout);
1704 if (i2c_dev->use_dma)
1713 i2c_dev->base + STM32F7_I2C_ISR);
1718 dev_dbg(i2c_dev->dev, "Access to slave 0x%x timed out\n",
1719 i2c_dev->msg->addr);
1720 if (i2c_dev->use_dma)
1722 stm32f7_i2c_wait_free_bus(i2c_dev);
1727 pm_runtime_mark_last_busy(i2c_dev->dev);
1728 pm_runtime_put_autosuspend(i2c_dev->dev);
1738 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(adapter);
1739 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
1740 struct stm32_i2c_dma *dma = i2c_dev->dma;
1741 struct device *dev = i2c_dev->dev;
1754 ret = stm32f7_i2c_wait_free_bus(i2c_dev);
1758 ret = stm32f7_i2c_smbus_xfer_msg(i2c_dev, flags, command, data);
1762 timeout = wait_for_completion_timeout(&i2c_dev->complete,
1763 i2c_dev->adap.timeout);
1766 if (i2c_dev->use_dma)
1775 i2c_dev->base + STM32F7_I2C_ISR);
1781 if (i2c_dev->use_dma)
1783 stm32f7_i2c_wait_free_bus(i2c_dev);
1790 ret = stm32f7_i2c_smbus_check_pec(i2c_dev);
1823 static void stm32f7_i2c_enable_wakeup(struct stm32f7_i2c_dev *i2c_dev,
1826 void __iomem *base = i2c_dev->base;
1829 if (!i2c_dev->wakeup_src)
1833 device_set_wakeup_enable(i2c_dev->dev, true);
1836 device_set_wakeup_enable(i2c_dev->dev, false);
1843 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(slave->adapter);
1844 void __iomem *base = i2c_dev->base;
1845 struct device *dev = i2c_dev->dev;
1854 if (stm32f7_i2c_is_slave_busy(i2c_dev)) {
1859 ret = stm32f7_i2c_get_free_slave_id(i2c_dev, slave, &id);
1867 if (!stm32f7_i2c_is_slave_registered(i2c_dev))
1868 stm32f7_i2c_enable_wakeup(i2c_dev, true);
1873 i2c_dev->slave[id] = slave;
1878 oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1);
1887 i2c_dev->slave[id] = slave;
1888 writel_relaxed(oar1, i2c_dev->base + STM32F7_I2C_OAR1);
1893 oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2);
1902 i2c_dev->slave[id] = slave;
1903 writel_relaxed(oar2, i2c_dev->base + STM32F7_I2C_OAR2);
1922 if (!stm32f7_i2c_is_slave_registered(i2c_dev))
1923 stm32f7_i2c_enable_wakeup(i2c_dev, false);
1933 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(slave->adapter);
1934 void __iomem *base = i2c_dev->base;
1938 ret = stm32f7_i2c_get_slave_id(i2c_dev, slave, &id);
1942 WARN_ON(!i2c_dev->slave[id]);
1944 ret = pm_runtime_resume_and_get(i2c_dev->dev);
1956 i2c_dev->slave[id] = NULL;
1958 if (!stm32f7_i2c_is_slave_registered(i2c_dev)) {
1959 stm32f7_i2c_disable_irq(i2c_dev, STM32F7_I2C_ALL_IRQ_MASK);
1960 stm32f7_i2c_enable_wakeup(i2c_dev, false);
1963 pm_runtime_mark_last_busy(i2c_dev->dev);
1964 pm_runtime_put_autosuspend(i2c_dev->dev);
1969 static int stm32f7_i2c_write_fm_plus_bits(struct stm32f7_i2c_dev *i2c_dev,
1974 if (i2c_dev->bus_rate <= I2C_MAX_FAST_MODE_FREQ ||
1975 IS_ERR_OR_NULL(i2c_dev->regmap))
1979 if (i2c_dev->fmp_sreg == i2c_dev->fmp_creg)
1980 ret = regmap_update_bits(i2c_dev->regmap,
1981 i2c_dev->fmp_sreg,
1982 i2c_dev->fmp_mask,
1983 enable ? i2c_dev->fmp_mask : 0);
1985 ret = regmap_write(i2c_dev->regmap,
1986 enable ? i2c_dev->fmp_sreg :
1987 i2c_dev->fmp_creg,
1988 i2c_dev->fmp_mask);
1994 struct stm32f7_i2c_dev *i2c_dev)
1999 i2c_dev->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg-fmp");
2000 if (IS_ERR(i2c_dev->regmap))
2005 &i2c_dev->fmp_sreg);
2009 i2c_dev->fmp_creg = i2c_dev->fmp_sreg +
2010 i2c_dev->setup.fmp_clr_offset;
2013 &i2c_dev->fmp_mask);
2016 static int stm32f7_i2c_enable_smbus_host(struct stm32f7_i2c_dev *i2c_dev)
2018 struct i2c_adapter *adap = &i2c_dev->adap;
2019 void __iomem *base = i2c_dev->base;
2026 i2c_dev->host_notify_client = client;
2034 static void stm32f7_i2c_disable_smbus_host(struct stm32f7_i2c_dev *i2c_dev)
2036 void __iomem *base = i2c_dev->base;
2038 if (i2c_dev->host_notify_client) {
2042 i2c_free_slave_host_notify_device(i2c_dev->host_notify_client);
2046 static int stm32f7_i2c_enable_smbus_alert(struct stm32f7_i2c_dev *i2c_dev)
2049 struct i2c_adapter *adap = &i2c_dev->adap;
2050 struct device *dev = i2c_dev->dev;
2051 void __iomem *base = i2c_dev->base;
2061 i2c_dev->alert = alert;
2069 static void stm32f7_i2c_disable_smbus_alert(struct stm32f7_i2c_dev *i2c_dev)
2071 struct stm32f7_i2c_alert *alert = i2c_dev->alert;
2072 void __iomem *base = i2c_dev->base;
2084 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
2093 if (i2c_dev->smbus_mode)
2109 struct stm32f7_i2c_dev *i2c_dev;
2117 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
2118 if (!i2c_dev)
2121 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
2122 if (IS_ERR(i2c_dev->base))
2123 return PTR_ERR(i2c_dev->base);
2134 i2c_dev->wakeup_src = of_property_read_bool(pdev->dev.of_node,
2137 i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);
2138 if (IS_ERR(i2c_dev->clk))
2139 return dev_err_probe(&pdev->dev, PTR_ERR(i2c_dev->clk),
2142 ret = clk_prepare_enable(i2c_dev->clk);
2158 i2c_dev->dev = &pdev->dev;
2164 pdev->name, i2c_dev);
2172 pdev->name, i2c_dev);
2185 i2c_dev->setup = *setup;
2187 ret = stm32f7_i2c_setup_timing(i2c_dev, &i2c_dev->setup);
2192 if (i2c_dev->bus_rate > I2C_MAX_FAST_MODE_FREQ) {
2193 ret = stm32f7_i2c_setup_fm_plus_bits(pdev, i2c_dev);
2196 ret = stm32f7_i2c_write_fm_plus_bits(i2c_dev, true);
2201 adap = &i2c_dev->adap;
2202 i2c_set_adapdata(adap, i2c_dev);
2212 init_completion(&i2c_dev->complete);
2215 i2c_dev->dma = stm32_i2c_dma_request(i2c_dev->dev, phy_addr,
2218 if (IS_ERR(i2c_dev->dma)) {
2219 ret = PTR_ERR(i2c_dev->dma);
2223 dev_dbg(i2c_dev->dev, "No DMA option: fallback using interrupts\n");
2224 i2c_dev->dma = NULL;
2227 if (i2c_dev->wakeup_src) {
2228 device_set_wakeup_capable(i2c_dev->dev, true);
2230 ret = dev_pm_set_wake_irq(i2c_dev->dev, irq_event);
2232 dev_err(i2c_dev->dev, "Failed to set wake up irq\n");
2237 platform_set_drvdata(pdev, i2c_dev);
2239 pm_runtime_set_autosuspend_delay(i2c_dev->dev,
2241 pm_runtime_use_autosuspend(i2c_dev->dev);
2242 pm_runtime_set_active(i2c_dev->dev);
2243 pm_runtime_enable(i2c_dev->dev);
2247 stm32f7_i2c_hw_config(i2c_dev);
2249 i2c_dev->smbus_mode = of_property_read_bool(pdev->dev.of_node, "smbus");
2255 if (i2c_dev->smbus_mode) {
2256 ret = stm32f7_i2c_enable_smbus_host(i2c_dev);
2258 dev_err(i2c_dev->dev,
2266 ret = stm32f7_i2c_enable_smbus_alert(i2c_dev);
2268 dev_err(i2c_dev->dev,
2275 dev_info(i2c_dev->dev, "STM32F7 I2C-%d bus adapter\n", adap->nr);
2277 pm_runtime_mark_last_busy(i2c_dev->dev);
2278 pm_runtime_put_autosuspend(i2c_dev->dev);
2283 stm32f7_i2c_disable_smbus_host(i2c_dev);
2289 pm_runtime_put_noidle(i2c_dev->dev);
2290 pm_runtime_disable(i2c_dev->dev);
2291 pm_runtime_set_suspended(i2c_dev->dev);
2292 pm_runtime_dont_use_autosuspend(i2c_dev->dev);
2294 if (i2c_dev->wakeup_src)
2295 dev_pm_clear_wake_irq(i2c_dev->dev);
2298 if (i2c_dev->wakeup_src)
2299 device_set_wakeup_capable(i2c_dev->dev, false);
2301 if (i2c_dev->dma) {
2302 stm32_i2c_dma_free(i2c_dev->dma);
2303 i2c_dev->dma = NULL;
2307 stm32f7_i2c_write_fm_plus_bits(i2c_dev, false);
2310 clk_disable_unprepare(i2c_dev->clk);
2317 struct stm32f7_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
2319 stm32f7_i2c_disable_smbus_alert(i2c_dev);
2320 stm32f7_i2c_disable_smbus_host(i2c_dev);
2322 i2c_del_adapter(&i2c_dev->adap);
2323 pm_runtime_get_sync(i2c_dev->dev);
2325 if (i2c_dev->wakeup_src) {
2326 dev_pm_clear_wake_irq(i2c_dev->dev);
2331 device_init_wakeup(i2c_dev->dev, false);
2334 pm_runtime_put_noidle(i2c_dev->dev);
2335 pm_runtime_disable(i2c_dev->dev);
2336 pm_runtime_set_suspended(i2c_dev->dev);
2337 pm_runtime_dont_use_autosuspend(i2c_dev->dev);
2339 if (i2c_dev->dma) {
2340 stm32_i2c_dma_free(i2c_dev->dma);
2341 i2c_dev->dma = NULL;
2344 stm32f7_i2c_write_fm_plus_bits(i2c_dev, false);
2346 clk_disable_unprepare(i2c_dev->clk);
2351 struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
2353 if (!stm32f7_i2c_is_slave_registered(i2c_dev))
2354 clk_disable_unprepare(i2c_dev->clk);
2361 struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
2364 if (!stm32f7_i2c_is_slave_registered(i2c_dev)) {
2365 ret = clk_prepare_enable(i2c_dev->clk);
2375 static int __maybe_unused stm32f7_i2c_regs_backup(struct stm32f7_i2c_dev *i2c_dev)
2378 struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs;
2380 ret = pm_runtime_resume_and_get(i2c_dev->dev);
2384 backup_regs->cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1);
2385 backup_regs->cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);
2386 backup_regs->oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1);
2387 backup_regs->oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2);
2388 backup_regs->tmgr = readl_relaxed(i2c_dev->base + STM32F7_I2C_TIMINGR);
2389 stm32f7_i2c_write_fm_plus_bits(i2c_dev, false);
2391 pm_runtime_put_sync(i2c_dev->dev);
2396 static int __maybe_unused stm32f7_i2c_regs_restore(struct stm32f7_i2c_dev *i2c_dev)
2400 struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs;
2402 ret = pm_runtime_resume_and_get(i2c_dev->dev);
2406 cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1);
2408 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1,
2411 writel_relaxed(backup_regs->tmgr, i2c_dev->base + STM32F7_I2C_TIMINGR);
2413 i2c_dev->base + STM32F7_I2C_CR1);
2415 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1,
2417 writel_relaxed(backup_regs->cr2, i2c_dev->base + STM32F7_I2C_CR2);
2418 writel_relaxed(backup_regs->oar1, i2c_dev->base + STM32F7_I2C_OAR1);
2419 writel_relaxed(backup_regs->oar2, i2c_dev->base + STM32F7_I2C_OAR2);
2420 stm32f7_i2c_write_fm_plus_bits(i2c_dev, true);
2422 pm_runtime_put_sync(i2c_dev->dev);
2429 struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
2432 i2c_mark_adapter_suspended(&i2c_dev->adap);
2435 ret = stm32f7_i2c_regs_backup(i2c_dev);
2437 i2c_mark_adapter_resumed(&i2c_dev->adap);
2450 struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
2459 ret = stm32f7_i2c_regs_restore(i2c_dev);
2464 i2c_mark_adapter_resumed(&i2c_dev->adap);