Lines Matching refs:i2c
2 /* linux/drivers/i2c/busses/i2c-s3c2410.c
13 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-s3c2410.h>
86 /* i2c controller state */
124 .name = "s3c2410-i2c",
127 .name = "s3c2440-i2c",
130 .name = "s3c2440-hdmiphy-i2c",
136 static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat);
140 { .compatible = "samsung,s3c2410-i2c", .data = (void *)0 },
141 { .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 },
142 { .compatible = "samsung,s3c2440-hdmiphy-i2c",
144 { .compatible = "samsung,exynos5-sata-phy-i2c",
166 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
168 dev_dbg(i2c->dev, "master_complete %d\n", ret);
170 i2c->msg_ptr = 0;
171 i2c->msg = NULL;
172 i2c->msg_idx++;
173 i2c->msg_num = 0;
175 i2c->msg_idx = ret;
177 if (!(i2c->quirks & QUIRK_POLL))
178 wake_up(&i2c->wait);
181 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)
185 tmp = readl(i2c->regs + S3C2410_IICCON);
186 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
189 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)
193 tmp = readl(i2c->regs + S3C2410_IICCON);
194 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
198 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)
202 tmp = readl(i2c->regs + S3C2410_IICCON);
203 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
206 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
210 tmp = readl(i2c->regs + S3C2410_IICCON);
211 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
214 static bool is_ack(struct s3c24xx_i2c *i2c)
219 unsigned long tmp = readl(i2c->regs + S3C2410_IICCON);
230 if (!(readl(i2c->regs + S3C2410_IICSTAT)
236 dev_err(i2c->dev, "ack was not received\n");
243 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,
263 s3c24xx_i2c_enable_ack(i2c);
265 iiccon = readl(i2c->regs + S3C2410_IICCON);
266 writel(stat, i2c->regs + S3C2410_IICSTAT);
268 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
269 writeb(addr, i2c->regs + S3C2410_IICDS);
275 ndelay(i2c->tx_setup);
277 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);
278 writel(iiccon, i2c->regs + S3C2410_IICCON);
281 writel(stat, i2c->regs + S3C2410_IICSTAT);
284 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
286 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
288 dev_dbg(i2c->dev, "STOP\n");
324 if (i2c->quirks & QUIRK_HDMIPHY) {
331 writel(iicstat, i2c->regs + S3C2410_IICSTAT);
333 i2c->state = STATE_STOP;
335 s3c24xx_i2c_master_complete(i2c, ret);
336 s3c24xx_i2c_disable_irq(i2c);
347 static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
349 return i2c->msg_idx >= (i2c->msg_num - 1);
355 static inline int is_msglast(struct s3c24xx_i2c *i2c)
362 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1)
365 return i2c->msg_ptr == i2c->msg->len-1;
371 static inline int is_msgend(struct s3c24xx_i2c *i2c)
373 return i2c->msg_ptr >= i2c->msg->len;
379 static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
385 switch (i2c->state) {
388 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
392 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
393 s3c24xx_i2c_disable_irq(i2c);
399 * bus, or started a new i2c message
402 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
404 dev_dbg(i2c->dev, "ack was not received\n");
405 s3c24xx_i2c_stop(i2c, -ENXIO);
409 if (i2c->msg->flags & I2C_M_RD)
410 i2c->state = STATE_READ;
412 i2c->state = STATE_WRITE;
416 * as this is used by the i2c probe to find devices.
418 if (is_lastmsg(i2c) && i2c->msg->len == 0) {
419 s3c24xx_i2c_stop(i2c, 0);
423 if (i2c->state == STATE_READ)
436 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
438 dev_dbg(i2c->dev, "WRITE: No Ack\n");
440 s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
447 if (!is_msgend(i2c)) {
448 byte = i2c->msg->buf[i2c->msg_ptr++];
449 writeb(byte, i2c->regs + S3C2410_IICDS);
458 ndelay(i2c->tx_setup);
460 } else if (!is_lastmsg(i2c)) {
461 /* we need to go to the next i2c message */
463 dev_dbg(i2c->dev, "WRITE: Next Message\n");
465 i2c->msg_ptr = 0;
466 i2c->msg_idx++;
467 i2c->msg++;
470 if (i2c->msg->flags & I2C_M_NOSTART) {
472 if (i2c->msg->flags & I2C_M_RD) {
478 dev_dbg(i2c->dev,
480 s3c24xx_i2c_stop(i2c, -EINVAL);
487 s3c24xx_i2c_message_start(i2c, i2c->msg);
488 i2c->state = STATE_START;
493 s3c24xx_i2c_stop(i2c, 0);
503 byte = readb(i2c->regs + S3C2410_IICDS);
504 i2c->msg->buf[i2c->msg_ptr++] = byte;
507 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1)
508 i2c->msg->len += byte;
510 if (is_msglast(i2c)) {
513 if (is_lastmsg(i2c))
514 s3c24xx_i2c_disable_ack(i2c);
516 } else if (is_msgend(i2c)) {
521 if (is_lastmsg(i2c)) {
523 dev_dbg(i2c->dev, "READ: Send Stop\n");
525 s3c24xx_i2c_stop(i2c, 0);
528 dev_dbg(i2c->dev, "READ: Next Transfer\n");
530 i2c->msg_ptr = 0;
531 i2c->msg_idx++;
532 i2c->msg++;
542 tmp = readl(i2c->regs + S3C2410_IICCON);
544 writel(tmp, i2c->regs + S3C2410_IICCON);
554 struct s3c24xx_i2c *i2c = dev_id;
558 status = readl(i2c->regs + S3C2410_IICSTAT);
562 dev_err(i2c->dev, "deal with arbitration loss\n");
565 if (i2c->state == STATE_IDLE) {
566 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
568 tmp = readl(i2c->regs + S3C2410_IICCON);
570 writel(tmp, i2c->regs + S3C2410_IICCON);
578 i2c_s3c_irq_nextbyte(i2c, status);
593 static inline void s3c24xx_i2c_disable_bus(struct s3c24xx_i2c *i2c)
598 tmp = readl(i2c->regs + S3C2410_IICSTAT);
600 writel(tmp, i2c->regs + S3C2410_IICSTAT);
603 tmp = readl(i2c->regs + S3C2410_IICCON);
606 writel(tmp, i2c->regs + S3C2410_IICCON);
611 * get the i2c bus for a master transaction
613 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
619 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
631 * wait for the i2c bus to become idle.
633 static void s3c24xx_i2c_wait_idle(struct s3c24xx_i2c *i2c)
642 dev_dbg(i2c->dev, "waiting for bus idle\n");
648 * end of a transaction. However, really slow i2c devices can stretch
655 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
658 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
675 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
679 dev_warn(i2c->dev, "timeout waiting for bus idle\n");
683 * this starts an i2c transfer
685 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c,
691 ret = s3c24xx_i2c_set_master(i2c);
693 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
698 i2c->msg = msgs;
699 i2c->msg_num = num;
700 i2c->msg_ptr = 0;
701 i2c->msg_idx = 0;
702 i2c->state = STATE_START;
704 s3c24xx_i2c_enable_irq(i2c);
705 s3c24xx_i2c_message_start(i2c, msgs);
707 if (i2c->quirks & QUIRK_POLL) {
708 while ((i2c->msg_num != 0) && is_ack(i2c)) {
709 unsigned long stat = readl(i2c->regs + S3C2410_IICSTAT);
711 i2c_s3c_irq_nextbyte(i2c, stat);
713 stat = readl(i2c->regs + S3C2410_IICSTAT);
715 dev_err(i2c->dev, "deal with arbitration loss\n");
718 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
721 ret = i2c->msg_idx;
728 dev_dbg(i2c->dev, "timeout\n");
730 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
733 if (i2c->quirks & QUIRK_HDMIPHY)
736 s3c24xx_i2c_wait_idle(i2c);
738 s3c24xx_i2c_disable_bus(i2c);
741 i2c->state = STATE_IDLE;
747 * first port of call from the i2c bus code when an message needs
748 * transferring across the i2c bus.
753 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
757 ret = clk_enable(i2c->clk);
763 ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
766 clk_disable(i2c->clk);
770 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
775 clk_disable(i2c->clk);
779 /* declare our i2c functionality */
786 /* i2c bus registration info */
825 static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)
827 struct s3c2410_platform_i2c *pdata = i2c->pdata;
828 unsigned long clkin = clk_get_rate(i2c->clk);
834 i2c->clkrate = clkin;
837 dev_dbg(i2c->dev, "pdata desired frequency %lu\n", pdata->frequency);
846 dev_err(i2c->dev,
854 iiccon = readl(i2c->regs + S3C2410_IICCON);
861 if (i2c->quirks & QUIRK_POLL)
864 writel(iiccon, i2c->regs + S3C2410_IICCON);
866 if (i2c->quirks & QUIRK_S3C2440) {
879 dev_dbg(i2c->dev, "IICLC=%08lx\n", sda_delay);
880 writel(sda_delay, i2c->regs + S3C2440_IICLC);
887 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
891 if (i2c->quirks & QUIRK_NO_GPIO)
895 i2c->gpios[i] = devm_gpiod_get_index(i2c->dev, NULL,
897 if (IS_ERR(i2c->gpios[i])) {
898 dev_err(i2c->dev, "i2c gpio invalid at index %d\n", i);
906 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
915 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
922 pdata = i2c->pdata;
926 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
928 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
930 writel(0, i2c->regs + S3C2410_IICCON);
931 writel(0, i2c->regs + S3C2410_IICSTAT);
935 if (s3c24xx_i2c_clockrate(i2c, &freq) != 0) {
936 dev_err(i2c->dev, "cannot meet bus frequency required\n");
940 /* todo - check that the i2c lines aren't being dragged anywhere */
942 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
943 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02x\n",
944 readl(i2c->regs + S3C2410_IICCON));
954 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c)
956 struct s3c2410_platform_i2c *pdata = i2c->pdata;
962 pdata->bus_num = -1; /* i2c bus number is dynamically assigned */
963 of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay);
964 of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr);
965 of_property_read_u32(np, "samsung,i2c-max-bus-freq",
968 * Exynos5's legacy i2c controller and new high speed i2c
971 * If nodes for first four channels of legacy i2c controller
975 id = of_alias_get_id(np, "i2c");
976 i2c->sysreg = syscon_regmap_lookup_by_phandle(np,
978 if (IS_ERR(i2c->sysreg))
981 regmap_update_bits(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, BIT(id), 0);
985 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c) { }
990 struct s3c24xx_i2c *i2c;
1003 i2c = devm_kzalloc(&pdev->dev, sizeof(struct s3c24xx_i2c), GFP_KERNEL);
1004 if (!i2c)
1007 i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1008 if (!i2c->pdata)
1011 i2c->quirks = s3c24xx_get_device_quirks(pdev);
1012 i2c->sysreg = ERR_PTR(-ENOENT);
1014 memcpy(i2c->pdata, pdata, sizeof(*pdata));
1016 s3c24xx_i2c_parse_dt(pdev->dev.of_node, i2c);
1018 strscpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name));
1019 i2c->adap.owner = THIS_MODULE;
1020 i2c->adap.algo = &s3c24xx_i2c_algorithm;
1021 i2c->adap.retries = 2;
1022 i2c->adap.class = I2C_CLASS_DEPRECATED;
1023 i2c->tx_setup = 50;
1025 init_waitqueue_head(&i2c->wait);
1028 i2c->dev = &pdev->dev;
1029 i2c->clk = devm_clk_get(&pdev->dev, "i2c");
1030 if (IS_ERR(i2c->clk)) {
1035 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
1038 i2c->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
1039 if (IS_ERR(i2c->regs))
1040 return PTR_ERR(i2c->regs);
1043 i2c->regs, res);
1045 /* setup info block for the i2c core */
1046 i2c->adap.algo_data = i2c;
1047 i2c->adap.dev.parent = &pdev->dev;
1048 i2c->pctrl = devm_pinctrl_get_select_default(i2c->dev);
1050 /* inititalise the i2c gpio lines */
1051 if (i2c->pdata->cfg_gpio)
1052 i2c->pdata->cfg_gpio(to_platform_device(i2c->dev));
1053 else if (IS_ERR(i2c->pctrl) && s3c24xx_i2c_parse_dt_gpio(i2c))
1056 /* initialise the i2c controller */
1057 ret = clk_prepare_enable(i2c->clk);
1063 ret = s3c24xx_i2c_init(i2c);
1064 clk_disable(i2c->clk);
1067 clk_unprepare(i2c->clk);
1075 if (!(i2c->quirks & QUIRK_POLL)) {
1076 i2c->irq = ret = platform_get_irq(pdev, 0);
1078 clk_unprepare(i2c->clk);
1082 ret = devm_request_irq(&pdev->dev, i2c->irq, s3c24xx_i2c_irq,
1083 0, dev_name(&pdev->dev), i2c);
1085 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
1086 clk_unprepare(i2c->clk);
1097 i2c->adap.nr = i2c->pdata->bus_num;
1098 i2c->adap.dev.of_node = pdev->dev.of_node;
1100 platform_set_drvdata(pdev, i2c);
1104 ret = i2c_add_numbered_adapter(&i2c->adap);
1107 clk_unprepare(i2c->clk);
1111 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev));
1117 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
1119 clk_unprepare(i2c->clk);
1123 i2c_del_adapter(&i2c->adap);
1128 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev);
1130 i2c_mark_adapter_suspended(&i2c->adap);
1132 if (!IS_ERR(i2c->sysreg))
1133 regmap_read(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, &i2c->sys_i2c_cfg);
1140 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev);
1143 if (!IS_ERR(i2c->sysreg))
1144 regmap_write(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, i2c->sys_i2c_cfg);
1146 ret = clk_enable(i2c->clk);
1149 s3c24xx_i2c_init(i2c);
1150 clk_disable(i2c->clk);
1151 i2c_mark_adapter_resumed(&i2c->adap);
1166 .name = "s3c-i2c",