Lines Matching defs:ICMCR
35 #define ICMCR 0x04 /* master ctrl */
53 /* ICMCR */
169 return !!(rcar_i2c_read(priv, ICMCR) & FSCL);
182 rcar_i2c_write(priv, ICMCR, priv->recovery_icmcr);
194 rcar_i2c_write(priv, ICMCR, priv->recovery_icmcr);
201 return !(rcar_i2c_read(priv, ICMCR) & FSDA);
216 rcar_i2c_write(priv, ICMCR, MDBS);
231 ret = readl_poll_timeout(priv->io + ICMCR, val, !(val & FSDA), 10,
337 * ICMSR and ICMCR depends on whether we issue START or REP_START. So, ICMSR
357 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
523 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
574 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
576 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
709 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
734 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);