Lines Matching defs:dev
225 struct device *dev;
280 static irqreturn_t qup_i2c_interrupt(int irq, void *dev)
282 struct qup_i2c_dev *qup = dev;
604 ret = dma_map_sg(qup->dev, sg, 1, dir);
626 qup->btx.dma = dma_request_chan(qup->dev, "tx");
630 dev_err(qup->dev, "\n tx channel not available");
636 qup->brx.dma = dma_request_chan(qup->dev, "rx");
638 dev_err(qup->dev, "\n rx channel not available");
754 dev_err(qup->dev, "failed to get tx desc\n");
777 dev_err(qup->dev, "failed to get rx desc\n");
797 dev_err(qup->dev, "normal trans timed out\n");
806 dev_err(qup->dev, "change to run state timed out");
814 dev_err(qup->dev, "flush timed out\n");
820 dma_unmap_sg(qup->dev, qup->btx.sg, tx_cnt, DMA_TO_DEVICE);
823 dma_unmap_sg(qup->dev, qup->brx.sg, rx_cnt,
1069 ret = pm_runtime_get_sync(qup->dev);
1113 pm_runtime_mark_last_busy(qup->dev);
1114 pm_runtime_put_autosuspend(qup->dev);
1548 ret = pm_runtime_get_sync(qup->dev);
1598 pm_runtime_mark_last_busy(qup->dev);
1599 pm_runtime_put_autosuspend(qup->dev);
1669 qup = devm_kzalloc(&pdev->dev, sizeof(*qup), GFP_KERNEL);
1673 qup->dev = &pdev->dev;
1678 dev_notice(qup->dev, "Using override frequency of %u\n", scl_freq);
1681 ret = device_property_read_u32(qup->dev, "clock-frequency", &clk_freq);
1683 dev_notice(qup->dev, "using default clock-frequency %d",
1688 if (of_device_is_compatible(pdev->dev.of_node, "qcom,i2c-qup-v1.1.1")) {
1696 if (acpi_match_device(qup_i2c_acpi_match, qup->dev))
1708 qup->btx.sg = devm_kcalloc(&pdev->dev,
1717 qup->brx.sg = devm_kcalloc(&pdev->dev,
1729 qup->start_tag.start = devm_kzalloc(&pdev->dev,
1736 qup->brx.tag.start = devm_kzalloc(&pdev->dev, 2, GFP_KERNEL);
1742 qup->btx.tag.start = devm_kzalloc(&pdev->dev, 2, GFP_KERNEL);
1753 dev_err(qup->dev, "clock frequency not supported %d\n",
1771 if (has_acpi_companion(qup->dev)) {
1772 ret = device_property_read_u32(qup->dev,
1775 dev_notice(qup->dev, "using default src-clock-hz %d",
1778 ACPI_COMPANION_SET(&qup->adap.dev, ACPI_COMPANION(qup->dev));
1780 qup->clk = devm_clk_get(qup->dev, "core");
1782 dev_err(qup->dev, "Could not get core clock\n");
1787 qup->pclk = devm_clk_get(qup->dev, "iface");
1789 dev_err(qup->dev, "Could not get iface clock\n");
1806 ret = devm_request_irq(qup->dev, qup->irq, qup_i2c_interrupt,
1810 dev_err(qup->dev, "Request %d IRQ failed\n", qup->irq);
1815 dev_dbg(qup->dev, "Revision %x\n", hw_ver);
1879 dev_dbg(qup->dev, "IN:block:%d, fifo:%d, OUT:block:%d, fifo:%d\n",
1884 qup->adap.dev.parent = qup->dev;
1885 qup->adap.dev.of_node = pdev->dev.of_node;
1890 pm_runtime_set_autosuspend_delay(qup->dev, MSEC_PER_SEC);
1891 pm_runtime_use_autosuspend(qup->dev);
1892 pm_runtime_set_active(qup->dev);
1893 pm_runtime_enable(qup->dev);
1902 pm_runtime_disable(qup->dev);
1903 pm_runtime_set_suspended(qup->dev);
1926 pm_runtime_disable(qup->dev);
1927 pm_runtime_set_suspended(qup->dev);