Lines Matching defs:base

129 	void __iomem *base;
143 val = readl(cci->base + CCI_IRQ_STATUS_0);
144 writel(val, cci->base + CCI_IRQ_CLEAR_0);
145 writel(0x1, cci->base + CCI_IRQ_GLOBAL_CLEAR_CMD);
181 writel(reset, cci->base + CCI_RESET_CMD);
190 writel(CCI_HALT_REQ_I2C_M0_Q0Q1, cci->base + CCI_HALT_REQ);
201 writel(CCI_HALT_REQ_I2C_M1_Q0Q1, cci->base + CCI_HALT_REQ);
222 writel(val, cci->base + CCI_HALT_REQ);
239 writel(CCI_RESET_CMD_MASK, cci->base + CCI_RESET_CMD);
265 writel(val, cci->base + CCI_IRQ_MASK_0);
277 writel(val, cci->base + CCI_I2C_Mm_SCL_CTL(i));
280 writel(val, cci->base + CCI_I2C_Mm_SDA_CTL_0(i));
283 writel(val, cci->base + CCI_I2C_Mm_SDA_CTL_1(i));
286 writel(val, cci->base + CCI_I2C_Mm_SDA_CTL_2(i));
289 writel(val, cci->base + CCI_I2C_Mm_MISC_CTL(i));
299 val = readl(cci->base + CCI_I2C_Mm_Qn_CUR_WORD_CNT(master, queue));
300 writel(val, cci->base + CCI_I2C_Mm_Qn_EXEC_WORD_CNT(master, queue));
304 writel(val, cci->base + CCI_QUEUE_START);
322 val = readl(cci->base + CCI_I2C_Mm_Qn_CUR_WORD_CNT(master, queue));
330 writel(val, cci->base + CCI_I2C_Mm_Qn_LOAD_DATA(master, queue));
352 writel(val, cci->base + CCI_I2C_Mm_Qn_LOAD_DATA(master, queue));
355 writel(val, cci->base + CCI_I2C_Mm_Qn_LOAD_DATA(master, queue));
361 words_read = readl(cci->base + CCI_I2C_Mm_READ_BUF_LEVEL(master));
370 val = readl(cci->base + CCI_I2C_Mm_READ_DATA(master));
405 writel(val, cci->base + CCI_I2C_Mm_Qn_LOAD_DATA(master, queue));
417 writel(val, cci->base + CCI_I2C_Mm_Qn_LOAD_DATA(master, queue));
421 writel(val, cci->base + CCI_I2C_Mm_Qn_LOAD_DATA(master, queue));
584 cci->base = devm_platform_get_and_ioremap_resource(pdev, 0, &r);
585 if (IS_ERR(cci->base))
586 return PTR_ERR(cci->base);
630 val = readl(cci->base + CCI_HW_VERSION);