Lines Matching defs:enable
92 /* init register and default value required to enable module */
170 #define NPCM_I2CCTL1_INTEN BIT(2) /* Interrupt enable */
173 #define NPCM_I2CCTL1_GCMEN BIT(5) /* Global call match enable */
174 #define NPCM_I2CCTL1_NMINTE BIT(6) /* New match interrupt enable */
175 #define NPCM_I2CCTL1_STASTRE BIT(7) /* Stall after start enable */
183 #define NPCM_I2CADDR_SAEN BIT(7) /* Slave address enable */
186 #define I2CCTL2_ENABLE BIT(0) /* Module enable */
191 #define I2CCTL3_ARPMEN BIT(2) /* ARP match enable */
435 /* enable\disable end of busy (EOB) interrupts */
436 static inline void npcm_i2c_eob_int(struct npcm_i2c *bus, bool enable)
447 if (enable)
507 static void npcm_i2c_int_enable(struct npcm_i2c *bus, bool enable)
513 if (enable)
591 static void npcm_i2c_slave_int_enable(struct npcm_i2c *bus, bool enable)
595 /* enable interrupt on slave match: */
598 if (enable)
606 u8 addr, bool enable)
612 sa_reg = (addr & 0x7F) | FIELD_PREP(NPCM_I2CADDR_SAEN, enable);
615 if (enable)
623 if (enable)
631 dev_err(bus->dev, "try to enable more than 2 SA not supported\n");
636 /* Set and enable the address */
638 npcm_i2c_slave_int_enable(bus, enable);
871 /* Set the enable bit */
1609 /* re-enable */