Lines Matching defs:mtk_i2c_writew
546 static void mtk_i2c_writew(struct mtk_i2c *i2c, u16 val,
558 mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_START);
560 mtk_i2c_writew(i2c, intr_stat_reg, OFFSET_INTR_STAT);
569 mtk_i2c_writew(i2c, I2C_HANDSHAKE_RST | I2C_SOFT_RST,
573 mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_SOFTRESET);
578 mtk_i2c_writew(i2c, I2C_SOFT_RST, OFFSET_SOFTRESET);
583 mtk_i2c_writew(i2c, I2C_IO_CONFIG_PUSH_PULL, OFFSET_IO_CONFIG);
585 mtk_i2c_writew(i2c, I2C_IO_CONFIG_OPEN_DRAIN, OFFSET_IO_CONFIG);
588 mtk_i2c_writew(i2c, I2C_DCM_DISABLE, OFFSET_DCM_EN);
590 mtk_i2c_writew(i2c, i2c->timing_reg, OFFSET_TIMING);
591 mtk_i2c_writew(i2c, i2c->high_speed_reg, OFFSET_HS);
593 mtk_i2c_writew(i2c, i2c->ltiming_reg, OFFSET_LTIMING);
602 mtk_i2c_writew(i2c, i2c->ac_timing.inter_clk_div,
604 mtk_i2c_writew(i2c, I2C_SCL_MIS_COMP_VALUE,
606 mtk_i2c_writew(i2c, i2c->ac_timing.sda_timing,
610 mtk_i2c_writew(i2c, i2c->ac_timing.htiming,
612 mtk_i2c_writew(i2c, i2c->ac_timing.hs, OFFSET_HS);
613 mtk_i2c_writew(i2c, i2c->ac_timing.ltiming,
616 mtk_i2c_writew(i2c, i2c->ac_timing.scl_hl_ratio,
618 mtk_i2c_writew(i2c, i2c->ac_timing.hs_scl_hl_ratio,
620 mtk_i2c_writew(i2c, i2c->ac_timing.sta_stop,
622 mtk_i2c_writew(i2c, i2c->ac_timing.hs_sta_stop,
626 mtk_i2c_writew(i2c, ext_conf_val, OFFSET_EXT_CONF);
630 mtk_i2c_writew(i2c, I2C_CONTROL_WRAPPER, OFFSET_PATH_DIR);
637 mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL);
638 mtk_i2c_writew(i2c, I2C_DELAY_LEN, OFFSET_DELAY_LEN);
1022 mtk_i2c_writew(i2c, 0x00, OFFSET_DEBUGCTRL);
1036 mtk_i2c_writew(i2c, I2C_HANDSHAKE_RST, OFFSET_SOFTRESET);
1037 mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_SOFTRESET);
1038 mtk_i2c_writew(i2c, I2C_RELIABILITY | I2C_DMAACK_ENABLE,
1050 mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL);
1053 mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR);
1056 mtk_i2c_writew(i2c, restart_flag | I2C_HS_NACKERR | I2C_ACKERR |
1059 mtk_i2c_writew(i2c, I2C_FIFO_ADDR_CLR, OFFSET_FIFO_ADDR_CLR);
1062 mtk_i2c_writew(i2c, restart_flag | I2C_HS_NACKERR | I2C_ACKERR |
1068 mtk_i2c_writew(i2c, msgs->len, OFFSET_TRANSFER_LEN);
1069 mtk_i2c_writew(i2c, (msgs + 1)->len,
1072 mtk_i2c_writew(i2c, msgs->len | ((msgs + 1)->len) << 8,
1075 mtk_i2c_writew(i2c, I2C_WRRD_TRANAC_VALUE, OFFSET_TRANSAC_LEN);
1077 mtk_i2c_writew(i2c, msgs->len, OFFSET_TRANSFER_LEN);
1078 mtk_i2c_writew(i2c, num, OFFSET_TRANSAC_LEN);
1196 mtk_i2c_writew(i2c, start_reg, OFFSET_START);
1202 mtk_i2c_writew(i2c, ~(restart_flag | I2C_HS_NACKERR | I2C_ACKERR |
1316 mtk_i2c_writew(i2c, intr_stat, OFFSET_INTR_STAT);
1328 mtk_i2c_writew(i2c, I2C_RS_MUL_CNFG | I2C_RS_MUL_TRIG |