Lines Matching defs:mode
24 #define PCH_BUFFER_MODE_ENABLE 0x0002 /* flag for Buffer mode enable */
33 #define PCH_I2CMOD 0x18 /* I2C mode register */
34 #define PCH_I2CBUFSLV 0x1C /* I2C buffer mode slave address register */
35 #define PCH_I2CBUFSUB 0x20 /* I2C buffer mode subaddress register */
36 #define PCH_I2CBUFFOR 0x24 /* I2C buffer mode format register */
37 #define PCH_I2CBUFCTL 0x28 /* I2C buffer mode control register */
38 #define PCH_I2CBUFMSK 0x2C /* I2C buffer mode interrupt mask register */
39 #define PCH_I2CBUFSTA 0x30 /* I2C buffer mode status register */
40 #define PCH_I2CBUFLEV 0x34 /* I2C buffer mode level register */
41 #define PCH_I2CESRFOR 0x38 /* EEPROM software reset mode format register */
42 #define PCH_I2CESRCTL 0x3C /* EEPROM software reset mode ctrl register */
43 #define PCH_I2CESRMSK 0x40 /* EEPROM software reset mode */
44 #define PCH_I2CESRSTA 0x44 /* EEPROM software reset mode status register */
136 * @pch_buff_mode_en: specifies if buffer mode is enabled
230 pch_dbg(adap, "Fast mode enabled\n");
243 reg_value |= NORMAL_INTR_ENBL; /* Enable interrupts in normal mode */
289 * pch_i2c_start() - Generate I2C start condition in normal mode.
292 * Generate I2C start condition in normal mode by setting I2CCTL.I2CMSTA to 1.
302 * pch_i2c_stop() - generate stop condition in normal mode.
348 * pch_i2c_repstart() - generate repeated start condition in normal mode
359 * pch_i2c_writebytes() - write data to I2C bus in normal mode
363 * In the case of compound mode it will be 1 for last message,
466 * pch_i2c_restart() - Generate I2C restart condition in normal mode.
469 * Generate I2C restart condition in normal mode by setting I2CCTL.I2CRSTA.
479 * pch_i2c_readbytes() - read data from I2C bus in normal mode.
627 u32 mode;
631 mode = ioread32(p + PCH_I2CMOD);
632 mode &= BUFFER_MODE | EEPROM_SR_MODE;
633 if (mode != NORMAL_MODE) {
635 "I2C-%d mode(%d) is not supported\n", mode, i);