Lines Matching refs:dev
159 static void bcm_kona_i2c_send_cmd_to_ctrl(struct bcm_kona_i2c_dev *dev,
162 dev_dbg(dev->device, "%s, %d\n", __func__, cmd);
168 dev->base + CS_OFFSET);
175 dev->base + CS_OFFSET);
182 dev->base + CS_OFFSET);
188 dev->base + CS_OFFSET);
192 dev_err(dev->device, "Unknown command %d\n", cmd);
196 static void bcm_kona_i2c_enable_clock(struct bcm_kona_i2c_dev *dev)
198 writel(readl(dev->base + CLKEN_OFFSET) | CLKEN_CLKEN_MASK,
199 dev->base + CLKEN_OFFSET);
202 static void bcm_kona_i2c_disable_clock(struct bcm_kona_i2c_dev *dev)
204 writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_CLKEN_MASK,
205 dev->base + CLKEN_OFFSET);
210 struct bcm_kona_i2c_dev *dev = devid;
211 uint32_t status = readl(dev->base + ISR_OFFSET);
219 dev->base + TXFCR_OFFSET);
221 writel(status & ~ISR_RESERVED_MASK, dev->base + ISR_OFFSET);
222 complete(&dev->done);
228 static int bcm_kona_i2c_wait_if_busy(struct bcm_kona_i2c_dev *dev)
232 while (readl(dev->base + ISR_OFFSET) & ISR_CMDBUSY_MASK)
234 dev_err(dev->device, "CMDBUSY timeout\n");
242 static int bcm_kona_send_i2c_cmd(struct bcm_kona_i2c_dev *dev,
249 rc = bcm_kona_i2c_wait_if_busy(dev);
254 writel(IER_I2C_INT_EN_MASK, dev->base + IER_OFFSET);
257 reinit_completion(&dev->done);
260 bcm_kona_i2c_send_cmd_to_ctrl(dev, cmd);
263 time_left = wait_for_completion_timeout(&dev->done, time_left);
266 writel(0, dev->base + IER_OFFSET);
269 dev_err(dev->device, "controller timed out\n");
274 bcm_kona_i2c_send_cmd_to_ctrl(dev, BCM_CMD_NOACTION);
280 static int bcm_kona_i2c_read_fifo_single(struct bcm_kona_i2c_dev *dev,
287 reinit_completion(&dev->done);
290 writel(IER_READ_COMPLETE_INT_MASK, dev->base + IER_OFFSET);
295 dev->base + RXFCR_OFFSET);
298 time_left = wait_for_completion_timeout(&dev->done, time_left);
301 writel(0, dev->base + IER_OFFSET);
304 dev_err(dev->device, "RX FIFO time out\n");
310 *buf = readl(dev->base + RXFIFORDOUT_OFFSET);
316 static int bcm_kona_i2c_read_fifo(struct bcm_kona_i2c_dev *dev,
332 rc = bcm_kona_i2c_read_fifo_single(dev, tmp_buf, bytes_to_read,
345 static int bcm_kona_i2c_write_byte(struct bcm_kona_i2c_dev *dev, uint8_t data,
353 rc = bcm_kona_i2c_wait_if_busy(dev);
358 writel(ISR_SES_DONE_MASK, dev->base + ISR_OFFSET);
361 writel(IER_I2C_INT_EN_MASK, dev->base + IER_OFFSET);
364 reinit_completion(&dev->done);
367 writel(data, dev->base + DAT_OFFSET);
370 time_left = wait_for_completion_timeout(&dev->done, time_left);
373 writel(0, dev->base + IER_OFFSET);
376 dev_dbg(dev->device, "controller timed out\n");
380 nak_received = readl(dev->base + CS_OFFSET) & CS_ACK_MASK ? 1 : 0;
383 dev_dbg(dev->device, "unexpected NAK/ACK\n");
391 static int bcm_kona_i2c_write_fifo_single(struct bcm_kona_i2c_dev *dev,
399 reinit_completion(&dev->done);
403 dev->base + IER_OFFSET);
406 disable_irq(dev->irq);
410 writel(buf[k], (dev->base + DAT_OFFSET));
413 enable_irq(dev->irq);
417 time_left = wait_for_completion_timeout(&dev->done, time_left);
418 fifo_status = readl(dev->base + FIFO_STATUS_OFFSET);
422 writel(0, dev->base + IER_OFFSET);
425 if (readl(dev->base + CS_OFFSET) & CS_ACK_MASK) {
426 dev_err(dev->device, "unexpected NAK\n");
432 dev_err(dev->device, "completion timed out\n");
441 static int bcm_kona_i2c_write_fifo(struct bcm_kona_i2c_dev *dev,
454 rc = bcm_kona_i2c_write_fifo_single(dev, tmp_buf,
467 static int bcm_kona_i2c_do_addr(struct bcm_kona_i2c_dev *dev,
475 if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0)
480 if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0)
485 if (bcm_kona_send_i2c_cmd(dev, BCM_CMD_RESTART) < 0)
490 if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0)
496 if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0)
503 static void bcm_kona_i2c_enable_autosense(struct bcm_kona_i2c_dev *dev)
505 writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_AUTOSENSE_OFF_MASK,
506 dev->base + CLKEN_OFFSET);
509 static void bcm_kona_i2c_config_timing(struct bcm_kona_i2c_dev *dev)
511 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK,
512 dev->base + HSTIM_OFFSET);
514 writel((dev->std_cfg->prescale << TIM_PRESCALE_SHIFT) |
515 (dev->std_cfg->time_p << TIM_P_SHIFT) |
516 (dev->std_cfg->no_div << TIM_NO_DIV_SHIFT) |
517 (dev->std_cfg->time_div << TIM_DIV_SHIFT),
518 dev->base + TIM_OFFSET);
520 writel((dev->std_cfg->time_m << CLKEN_M_SHIFT) |
521 (dev->std_cfg->time_n << CLKEN_N_SHIFT) |
523 dev->base + CLKEN_OFFSET);
526 static void bcm_kona_i2c_config_timing_hs(struct bcm_kona_i2c_dev *dev)
528 writel((dev->hs_cfg->prescale << TIM_PRESCALE_SHIFT) |
529 (dev->hs_cfg->time_p << TIM_P_SHIFT) |
530 (dev->hs_cfg->no_div << TIM_NO_DIV_SHIFT) |
531 (dev->hs_cfg->time_div << TIM_DIV_SHIFT),
532 dev->base + TIM_OFFSET);
534 writel((dev->hs_cfg->hs_hold << HSTIM_HS_HOLD_SHIFT) |
535 (dev->hs_cfg->hs_high_phase << HSTIM_HS_HIGH_PHASE_SHIFT) |
536 (dev->hs_cfg->hs_setup << HSTIM_HS_SETUP_SHIFT),
537 dev->base + HSTIM_OFFSET);
539 writel(readl(dev->base + HSTIM_OFFSET) | HSTIM_HS_MODE_MASK,
540 dev->base + HSTIM_OFFSET);
543 static int bcm_kona_i2c_switch_to_hs(struct bcm_kona_i2c_dev *dev)
548 rc = bcm_kona_i2c_write_byte(dev, MASTERCODE, 1);
555 rc = clk_set_rate(dev->external_clk, HS_EXT_CLK_FREQ);
557 dev_err(dev->device, "%s: clk_set_rate returned %d\n",
563 bcm_kona_i2c_config_timing_hs(dev);
566 rc = bcm_kona_send_i2c_cmd(dev, BCM_CMD_RESTART);
568 dev_err(dev->device, "High speed restart command failed\n");
573 static int bcm_kona_i2c_switch_to_std(struct bcm_kona_i2c_dev *dev)
578 bcm_kona_i2c_config_timing(dev);
581 rc = clk_set_rate(dev->external_clk, STD_EXT_CLK_FREQ);
583 dev_err(dev->device, "%s: clk_set_rate returned %d\n",
594 struct bcm_kona_i2c_dev *dev = i2c_get_adapdata(adapter);
599 rc = clk_prepare_enable(dev->external_clk);
601 dev_err(dev->device, "%s: peri clock enable failed. err %d\n",
607 writel(0, dev->base + PADCTL_OFFSET);
610 bcm_kona_i2c_enable_clock(dev);
613 rc = bcm_kona_send_i2c_cmd(dev, BCM_CMD_START);
615 dev_err(dev->device, "Start command failed rc = %d\n", rc);
620 if (dev->hs_cfg) {
621 rc = bcm_kona_i2c_switch_to_hs(dev);
632 rc = bcm_kona_send_i2c_cmd(dev, BCM_CMD_RESTART);
634 dev_err(dev->device,
642 rc = bcm_kona_i2c_do_addr(dev, pmsg);
644 dev_err(dev->device,
653 rc = bcm_kona_i2c_read_fifo(dev, pmsg);
655 dev_err(dev->device, "read failure\n");
659 rc = bcm_kona_i2c_write_fifo(dev, pmsg);
661 dev_err(dev->device, "write failure");
671 bcm_kona_send_i2c_cmd(dev, BCM_CMD_STOP);
674 if (dev->hs_cfg) {
675 int hs_rc = bcm_kona_i2c_switch_to_std(dev);
683 writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET);
686 bcm_kona_i2c_disable_clock(dev);
688 clk_disable_unprepare(dev->external_clk);
704 static int bcm_kona_i2c_assign_bus_speed(struct bcm_kona_i2c_dev *dev)
707 int ret = of_property_read_u32(dev->device->of_node, "clock-frequency",
710 dev_err(dev->device, "missing clock-frequency property\n");
716 dev->std_cfg = &std_cfg_table[BCM_SPD_100K];
719 dev->std_cfg = &std_cfg_table[BCM_SPD_400K];
722 dev->std_cfg = &std_cfg_table[BCM_SPD_1MHZ];
726 dev->std_cfg = &std_cfg_table[BCM_SPD_100K];
727 dev->hs_cfg = &hs_cfg_table[BCM_SPD_3P4MHZ];
741 struct bcm_kona_i2c_dev *dev;
745 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
746 if (!dev)
749 platform_set_drvdata(pdev, dev);
750 dev->device = &pdev->dev;
751 init_completion(&dev->done);
754 dev->base = devm_platform_ioremap_resource(pdev, 0);
755 if (IS_ERR(dev->base))
756 return PTR_ERR(dev->base);
759 dev->external_clk = devm_clk_get(dev->device, NULL);
760 if (IS_ERR(dev->external_clk)) {
761 dev_err(dev->device, "couldn't get clock\n");
765 rc = clk_set_rate(dev->external_clk, STD_EXT_CLK_FREQ);
767 dev_err(dev->device, "%s: clk_set_rate returned %d\n",
772 rc = clk_prepare_enable(dev->external_clk);
774 dev_err(dev->device, "couldn't enable clock\n");
779 rc = bcm_kona_i2c_assign_bus_speed(dev);
784 bcm_kona_i2c_enable_clock(dev);
787 bcm_kona_i2c_config_timing(dev);
790 writel(0, dev->base + TOUT_OFFSET);
793 bcm_kona_i2c_enable_autosense(dev);
797 dev->base + TXFCR_OFFSET);
800 writel(0, dev->base + IER_OFFSET);
809 dev->base + ISR_OFFSET);
812 dev->irq = platform_get_irq(pdev, 0);
813 if (dev->irq < 0) {
814 rc = dev->irq;
819 rc = devm_request_irq(&pdev->dev, dev->irq, bcm_kona_i2c_isr,
820 IRQF_SHARED, pdev->name, dev);
822 dev_err(dev->device, "failed to request irq %i\n", dev->irq);
827 bcm_kona_i2c_send_cmd_to_ctrl(dev, BCM_CMD_NOACTION);
830 writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET);
833 bcm_kona_i2c_disable_clock(dev);
836 clk_disable_unprepare(dev->external_clk);
839 adap = &dev->adapter;
840 i2c_set_adapdata(adap, dev);
844 adap->dev.parent = &pdev->dev;
845 adap->dev.of_node = pdev->dev.of_node;
851 dev_info(dev->device, "device registered successfully\n");
856 bcm_kona_i2c_disable_clock(dev);
857 clk_disable_unprepare(dev->external_clk);
864 struct bcm_kona_i2c_dev *dev = platform_get_drvdata(pdev);
866 i2c_del_adapter(&dev->adapter);