Lines Matching defs:value
246 u8 value;
271 i2c_slave_event(slave, I2C_SLAVE_STOP, &value);
297 value = readl(bus->base + ASPEED_I2C_BYTE_BUF_REG) >> 8;
300 if (value & 0x1)
315 i2c_slave_event(slave, I2C_SLAVE_READ_REQUESTED, &value);
316 writel(value, bus->base + ASPEED_I2C_BYTE_BUF_REG);
326 i2c_slave_event(slave, I2C_SLAVE_READ_PROCESSED, &value);
327 writel(value, bus->base + ASPEED_I2C_BYTE_BUF_REG);
332 ret = i2c_slave_event(slave, I2C_SLAVE_WRITE_REQUESTED, &value);
341 i2c_slave_event(slave, I2C_SLAVE_WRITE_RECEIVED, &value);
831 * SCL_high and SCL_low represent a value 1 greater than what is stored
832 * since a zero divider is meaningless. Thus, the max value each can
834 * together (see below), the max value of both is the max value of one
843 * where base_freq is a programmable clock divider; its value is
895 * value of 8 giving a clk_high_low_max of 16.
904 * value of 16 giving a clk_high_low_max of 32.