Lines Matching defs:base
144 void __iomem *base;
146 /* Synchronizes I/O mem access to base. */
180 command = readl(bus->base + ASPEED_I2C_CMD_REG);
190 writel(ASPEED_I2CD_M_STOP_CMD, bus->base + ASPEED_I2C_CMD_REG);
202 else if (!(readl(bus->base + ASPEED_I2C_CMD_REG) &
213 bus->base + ASPEED_I2C_CMD_REG);
225 else if (!(readl(bus->base + ASPEED_I2C_CMD_REG) &
291 command = readl(bus->base + ASPEED_I2C_CMD_REG);
297 value = readl(bus->base + ASPEED_I2C_BYTE_BUF_REG) >> 8;
316 writel(value, bus->base + ASPEED_I2C_BYTE_BUF_REG);
317 writel(ASPEED_I2CD_S_TX_CMD, bus->base + ASPEED_I2C_CMD_REG);
327 writel(value, bus->base + ASPEED_I2C_BYTE_BUF_REG);
328 writel(ASPEED_I2CD_S_TX_CMD, bus->base + ASPEED_I2C_CMD_REG);
338 writel(ASPEED_I2CD_M_S_RX_CMD_LAST, bus->base + ASPEED_I2C_CMD_REG);
389 writel(slave_addr, bus->base + ASPEED_I2C_BYTE_BUF_REG);
390 writel(command, bus->base + ASPEED_I2C_CMD_REG);
397 writel(ASPEED_I2CD_M_STOP_CMD, bus->base + ASPEED_I2C_CMD_REG);
486 writel(readl(bus->base + ASPEED_I2C_CMD_REG) &
488 bus->base + ASPEED_I2C_CMD_REG);
534 bus->base + ASPEED_I2C_BYTE_BUF_REG);
536 bus->base + ASPEED_I2C_CMD_REG);
553 recv_byte = readl(bus->base + ASPEED_I2C_BYTE_BUF_REG) >> 8;
572 writel(command, bus->base + ASPEED_I2C_CMD_REG);
624 irq_received = readl(bus->base + ASPEED_I2C_INTR_STS_REG);
627 bus->base + ASPEED_I2C_INTR_STS_REG);
628 readl(bus->base + ASPEED_I2C_INTR_STS_REG);
674 bus->base + ASPEED_I2C_INTR_STS_REG);
675 readl(bus->base + ASPEED_I2C_INTR_STS_REG);
692 (readl(bus->base + ASPEED_I2C_CMD_REG) &
722 (readl(bus->base + ASPEED_I2C_CMD_REG) &
762 writel(addr_reg_val, bus->base + ASPEED_I2C_DEV_ADDR_REG);
765 func_ctrl_reg_val = readl(bus->base + ASPEED_I2C_FUN_CTRL_REG);
767 writel(func_ctrl_reg_val, bus->base + ASPEED_I2C_FUN_CTRL_REG);
804 func_ctrl_reg_val = readl(bus->base + ASPEED_I2C_FUN_CTRL_REG);
806 writel(func_ctrl_reg_val, bus->base + ASPEED_I2C_FUN_CTRL_REG);
915 clk_reg_val = readl(bus->base + ASPEED_I2C_AC_TIMING_REG1);
920 writel(clk_reg_val, bus->base + ASPEED_I2C_AC_TIMING_REG1);
921 writel(ASPEED_NO_TIMEOUT_CTRL, bus->base + ASPEED_I2C_AC_TIMING_REG2);
934 writel(0, bus->base + ASPEED_I2C_FUN_CTRL_REG);
946 writel(readl(bus->base + ASPEED_I2C_FUN_CTRL_REG) | fun_ctrl_reg,
947 bus->base + ASPEED_I2C_FUN_CTRL_REG);
956 writel(ASPEED_I2CD_INTR_ALL, bus->base + ASPEED_I2C_INTR_CTRL_REG);
970 writel(0, bus->base + ASPEED_I2C_INTR_CTRL_REG);
971 writel(0xffffffff, bus->base + ASPEED_I2C_INTR_STS_REG);
1008 bus->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
1009 if (IS_ERR(bus->base))
1010 return PTR_ERR(bus->base);
1056 writel(0, bus->base + ASPEED_I2C_INTR_CTRL_REG);
1057 writel(0xffffffff, bus->base + ASPEED_I2C_INTR_STS_REG);
1092 writel(0, bus->base + ASPEED_I2C_FUN_CTRL_REG);
1093 writel(0, bus->base + ASPEED_I2C_INTR_CTRL_REG);