Lines Matching refs:w83791d_write
200 static inline int w83791d_write(struct i2c_client *client, u8 reg, u8 value)
321 static int w83791d_write(struct i2c_client *client, u8 reg, u8 value);
380 w83791d_write(client, W83791D_REG_IN_##REG[nr], data->in_##reg[nr]); \
466 w83791d_write(client, W83791D_REG_BEEP_CTRL[bytenr],
546 w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
632 w83791d_write(client, W83791D_REG_FAN_DIV[indx],
641 w83791d_write(client, W83791D_REG_VBAT,
647 w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
731 w83791d_write(client, W83791D_REG_PWM[nr], data->pwm[nr]);
800 w83791d_write(client, W83791D_REG_FAN_CFG[reg_idx], reg_cfg_tmp);
841 w83791d_write(client, W83791D_REG_TEMP_TARGET[nr],
903 w83791d_write(client, W83791D_REG_TEMP_TOL[reg_idx],
943 w83791d_write(client, W83791D_REG_TEMP1[nr], data->temp1[nr]);
977 w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2],
979 w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2 + 1],
1082 w83791d_write(client, W83791D_REG_BEEP_CTRL[i], (val & 0xff));
1118 w83791d_write(client, W83791D_REG_BEEP_CTRL[1], val);
1273 w83791d_write(client, W83791D_REG_I2C_SUBADDR,
1328 w83791d_write(client, W83791D_REG_BANK, val1 | 0x80);
1442 w83791d_write(client, W83791D_REG_CONFIG, 0x80);
1446 w83791d_write(client, W83791D_REG_BEEP_CONFIG, old_beep | 0x80);
1450 w83791d_write(client, W83791D_REG_BEEP_CTRL[1], tmp & 0xef);
1456 w83791d_write(client, W83791D_REG_TEMP2_CONFIG,
1462 w83791d_write(client, W83791D_REG_TEMP3_CONFIG,
1468 w83791d_write(client, W83791D_REG_CONFIG, tmp | 0x01);