Lines Matching refs:W83781D_ADDR_REG_OFFSET
71 #define W83781D_ADDR_REG_OFFSET 5
1671 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1675 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1679 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1686 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1703 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1707 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1712 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1717 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1769 res->start + W83781D_ADDR_REG_OFFSET, 2,
1876 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1882 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1883 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1884 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1890 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1896 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1898 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1905 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1913 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1919 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1922 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);