Lines Matching refs:data
54 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
83 #define SIO_REG_VID_DATA 0xF1 /* VID data */
392 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
395 if (data->bank != bank) {
396 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
397 outb_p(bank, data->addr + DATA_REG_OFFSET);
398 data->bank = bank;
402 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
406 mutex_lock(&data->lock);
408 w83627ehf_set_bank(data, reg);
409 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
410 res = inb_p(data->addr + DATA_REG_OFFSET);
413 data->addr + ADDR_REG_OFFSET);
414 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
417 mutex_unlock(&data->lock);
421 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
426 mutex_lock(&data->lock);
428 w83627ehf_set_bank(data, reg);
429 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
431 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
433 data->addr + ADDR_REG_OFFSET);
435 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
437 mutex_unlock(&data->lock);
442 static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)
446 res = w83627ehf_read_value(data, reg);
453 static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,
458 return w83627ehf_write_value(data, reg, value);
461 /* This function assumes that the caller holds data->update_lock */
462 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
468 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
469 | ((data->fan_div[0] & 0x03) << 4);
471 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
472 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
473 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
474 | ((data->fan_div[0] & 0x04) << 3);
475 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
478 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
479 | ((data->fan_div[1] & 0x03) << 6);
481 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
482 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
483 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
484 | ((data->fan_div[1] & 0x04) << 4);
485 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
488 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
489 | ((data->fan_div[2] & 0x03) << 6);
490 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
491 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
492 | ((data->fan_div[2] & 0x04) << 5);
493 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
496 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
497 | (data->fan_div[3] & 0x03);
498 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
499 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
500 | ((data->fan_div[3] & 0x04) << 5);
501 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
504 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
505 | ((data->fan_div[4] & 0x03) << 2)
506 | ((data->fan_div[4] & 0x04) << 5);
507 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
512 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
516 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
517 data->fan_div[0] = (i >> 4) & 0x03;
518 data->fan_div[1] = (i >> 6) & 0x03;
519 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
520 data->fan_div[2] = (i >> 6) & 0x03;
521 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
522 data->fan_div[0] |= (i >> 3) & 0x04;
523 data->fan_div[1] |= (i >> 4) & 0x04;
524 data->fan_div[2] |= (i >> 5) & 0x04;
525 if (data->has_fan & ((1 << 3) | (1 << 4))) {
526 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
527 data->fan_div[3] = i & 0x03;
528 data->fan_div[4] = ((i >> 2) & 0x03)
531 if (data->has_fan & (1 << 3)) {
532 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
533 data->fan_div[3] |= (i >> 5) & 0x04;
537 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
542 for (i = 0; i < data->pwm_num; i++) {
543 if (!(data->has_fan & (1 << i)))
548 pwmcfg = w83627ehf_read_value(data,
550 tolerance = w83627ehf_read_value(data,
553 data->pwm_mode[i] =
555 data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
557 data->pwm[i] = w83627ehf_read_value(data, W83627EHF_REG_PWM[i]);
559 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
565 struct w83627ehf_data *data = dev_get_drvdata(dev);
568 mutex_lock(&data->update_lock);
570 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
571 || !data->valid) {
573 w83627ehf_update_fan_div(data);
576 for (i = 0; i < data->in_num; i++) {
577 if ((i == 6) && data->in6_skip)
580 data->in[i] = w83627ehf_read_value(data,
582 data->in_min[i] = w83627ehf_read_value(data,
584 data->in_max[i] = w83627ehf_read_value(data,
592 if (!(data->has_fan & (1 << i)))
595 reg = w83627ehf_read_value(data, W83627EHF_REG_FAN[i]);
596 data->rpm[i] = fan_from_reg8(reg, data->fan_div[i]);
598 if (data->has_fan_min & (1 << i))
599 data->fan_min[i] = w83627ehf_read_value(data,
607 if (reg >= 0xff && data->fan_div[i] < 0x07) {
610 i + 1, div_from_reg(data->fan_div[i]),
611 div_from_reg(data->fan_div[i] + 1));
612 data->fan_div[i]++;
613 w83627ehf_write_fan_div(data, i);
615 if ((data->has_fan_min & (1 << i))
616 && data->fan_min[i] >= 2
617 && data->fan_min[i] != 255)
618 w83627ehf_write_value(data,
620 (data->fan_min[i] /= 2));
624 w83627ehf_update_pwm(data);
626 for (i = 0; i < data->pwm_num; i++) {
627 if (!(data->has_fan & (1 << i)))
630 data->fan_start_output[i] =
631 w83627ehf_read_value(data,
633 data->fan_stop_output[i] =
634 w83627ehf_read_value(data,
636 data->fan_stop_time[i] =
637 w83627ehf_read_value(data,
640 if (data->REG_FAN_MAX_OUTPUT &&
641 data->REG_FAN_MAX_OUTPUT[i] != 0xff)
642 data->fan_max_output[i] =
643 w83627ehf_read_value(data,
644 data->REG_FAN_MAX_OUTPUT[i]);
646 if (data->REG_FAN_STEP_OUTPUT &&
647 data->REG_FAN_STEP_OUTPUT[i] != 0xff)
648 data->fan_step_output[i] =
649 w83627ehf_read_value(data,
650 data->REG_FAN_STEP_OUTPUT[i]);
652 data->target_temp[i] =
653 w83627ehf_read_value(data,
655 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
660 if (!(data->have_temp & (1 << i)))
662 data->temp[i] = w83627ehf_read_temp(data,
663 data->reg_temp[i]);
664 if (data->reg_temp_over[i])
665 data->temp_max[i]
666 = w83627ehf_read_temp(data,
667 data->reg_temp_over[i]);
668 if (data->reg_temp_hyst[i])
669 data->temp_max_hyst[i]
670 = w83627ehf_read_temp(data,
671 data->reg_temp_hyst[i]);
674 if (data->have_temp_offset & (1 << i))
675 data->temp_offset[i]
676 = w83627ehf_read_value(data,
680 data->alarms = w83627ehf_read_value(data,
682 (w83627ehf_read_value(data,
684 (w83627ehf_read_value(data,
687 data->caseopen = w83627ehf_read_value(data,
690 data->last_updated = jiffies;
691 data->valid = true;
694 mutex_unlock(&data->update_lock);
695 return data;
700 store_in_##reg(struct device *dev, struct w83627ehf_data *data, int channel, \
705 mutex_lock(&data->update_lock); \
706 data->in_##reg[channel] = in_to_reg(val, channel, data->scale_in); \
707 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(channel), \
708 data->in_##reg[channel]); \
709 mutex_unlock(&data->update_lock); \
717 store_fan_min(struct device *dev, struct w83627ehf_data *data, int channel,
726 mutex_lock(&data->update_lock);
729 data->fan_min[channel] = 255;
730 new_div = data->fan_div[channel]; /* No change */
738 data->fan_min[channel] = 254;
748 data->fan_min[channel] = 1;
764 data->fan_min[channel] = reg;
771 if (new_div != data->fan_div[channel]) {
773 channel + 1, div_from_reg(data->fan_div[channel]),
775 data->fan_div[channel] = new_div;
776 w83627ehf_write_fan_div(data, channel);
778 data->last_updated = jiffies;
781 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[channel],
782 data->fan_min[channel]);
783 mutex_unlock(&data->update_lock);
790 store_##reg(struct device *dev, struct w83627ehf_data *data, int channel, \
793 mutex_lock(&data->update_lock); \
794 data->reg[channel] = LM75_TEMP_TO_REG(val); \
795 w83627ehf_write_temp(data, data->addr[channel], data->reg[channel]); \
796 mutex_unlock(&data->update_lock); \
803 store_temp_offset(struct device *dev, struct w83627ehf_data *data, int channel,
808 mutex_lock(&data->update_lock);
809 data->temp_offset[channel] = val;
810 w83627ehf_write_value(data, W83627EHF_REG_TEMP_OFFSET[channel], val);
811 mutex_unlock(&data->update_lock);
816 store_pwm_mode(struct device *dev, struct w83627ehf_data *data, int channel,
824 mutex_lock(&data->update_lock);
825 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[channel]);
826 data->pwm_mode[channel] = val;
830 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[channel], reg);
831 mutex_unlock(&data->update_lock);
836 store_pwm(struct device *dev, struct w83627ehf_data *data, int channel,
841 mutex_lock(&data->update_lock);
842 data->pwm[channel] = val;
843 w83627ehf_write_value(data, W83627EHF_REG_PWM[channel], val);
844 mutex_unlock(&data->update_lock);
849 store_pwm_enable(struct device *dev, struct w83627ehf_data *data, int channel,
855 (val > 4 && val != data->pwm_enable_orig[channel]))
858 mutex_lock(&data->update_lock);
859 data->pwm_enable[channel] = val;
860 reg = w83627ehf_read_value(data,
864 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[channel],
866 mutex_unlock(&data->update_lock);
874 struct w83627ehf_data *data = w83627ehf_update_device(dev->parent); \
878 return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
888 struct w83627ehf_data *data = dev_get_drvdata(dev);
900 mutex_lock(&data->update_lock);
901 data->target_temp[nr] = val;
902 w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
903 mutex_unlock(&data->update_lock);
911 struct w83627ehf_data *data = dev_get_drvdata(dev);
925 mutex_lock(&data->update_lock);
926 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
931 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
932 data->tolerance[nr] = val;
933 mutex_unlock(&data->update_lock);
961 struct w83627ehf_data *data = w83627ehf_update_device(dev->parent); \
965 return sprintf(buf, "%d\n", data->reg[nr]); \
971 struct w83627ehf_data *data = dev_get_drvdata(dev); \
981 mutex_lock(&data->update_lock); \
982 data->reg[nr] = val; \
983 w83627ehf_write_value(data, REG[nr], val); \
984 mutex_unlock(&data->update_lock); \
990 fan_functions(fan_max_output, data->REG_FAN_MAX_OUTPUT)
991 fan_functions(fan_step_output, data->REG_FAN_STEP_OUTPUT)
997 struct w83627ehf_data *data = w83627ehf_update_device(dev->parent); \
1002 step_time_from_reg(data->reg[nr], \
1003 data->pwm_mode[nr])); \
1010 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1019 val = step_time_to_reg(val, data->pwm_mode[nr]); \
1020 mutex_lock(&data->update_lock); \
1021 data->reg[nr] = val; \
1022 w83627ehf_write_value(data, REG[nr], val); \
1023 mutex_unlock(&data->update_lock); \
1081 struct w83627ehf_data *data = dev_get_drvdata(dev);
1082 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1089 clear_caseopen(struct device *dev, struct w83627ehf_data *data, int channel,
1098 mutex_lock(&data->update_lock);
1099 reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
1100 w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
1101 w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
1102 data->valid = false; /* Force cache refresh */
1103 mutex_unlock(&data->update_lock);
1112 struct w83627ehf_data *data = dev_get_drvdata(dev);
1119 if (devattr->show == cpu0_vid_show && data->have_vid)
1133 data->REG_FAN_STEP_OUTPUT &&
1134 data->REG_FAN_STEP_OUTPUT[sda->index] != 0xff)
1139 (data->has_fan & (1 << 2)) && data->pwm_num >= 3 &&
1146 (data->has_fan & (1 << 3)) && data->pwm_num >= 4 &&
1156 (data->has_fan & (1 << sda->index)) &&
1157 sda->index < data->pwm_num)
1217 static inline void w83627ehf_init_device(struct w83627ehf_data *data,
1224 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1226 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1231 if (!(data->have_temp & (1 << i)))
1233 if (!data->reg_temp_config[i])
1235 tmp = w83627ehf_read_value(data,
1236 data->reg_temp_config[i]);
1238 w83627ehf_write_value(data,
1239 data->reg_temp_config[i],
1244 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1246 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1251 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1262 if (data->temp_label)
1263 label = data->temp_label[data->temp_src[i]];
1267 data->temp_type[i] = 6;
1269 data->temp_type[i] = 5;
1271 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
1273 data->temp_type[i] = 4; /* thermistor */
1278 w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)
1283 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1284 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1285 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1286 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1292 struct w83627ehf_data *data)
1298 data->has_fan = 0x03; /* fan1 and fan2 */
1299 data->has_fan_min = 0x03;
1314 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
1315 data->has_fan |= (fan3pin << 2);
1316 data->has_fan_min |= (fan3pin << 2);
1325 regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1327 data->has_fan |= (1 << 3);
1328 data->has_fan_min |= (1 << 3);
1331 data->has_fan |= (1 << 4);
1332 data->has_fan_min |= (1 << 4);
1340 const struct w83627ehf_data *data = drvdata;
1345 if (!(data->have_temp & (1 << channel)))
1350 if (data->temp_label)
1354 if (channel == 2 && data->temp3_val_only)
1357 if (data->reg_temp_over[channel])
1363 if (data->reg_temp_hyst[channel])
1373 if (data->have_temp_offset & (1 << channel))
1382 if (!(data->has_fan & (1 << channel)))
1390 if (data->has_fan_min & (1 << channel))
1399 if (channel >= data->in_num)
1401 if (channel == 6 && data->in6_skip)
1411 if (!(data->has_fan & (1 << channel)) ||
1412 channel >= data->pwm_num)
1430 w83627ehf_do_read_temp(struct w83627ehf_data *data, u32 attr,
1435 *val = LM75_TEMP_FROM_REG(data->temp[channel]);
1438 *val = LM75_TEMP_FROM_REG(data->temp_max[channel]);
1441 *val = LM75_TEMP_FROM_REG(data->temp_max_hyst[channel]);
1444 *val = data->temp_offset[channel] * 1000;
1447 *val = (int)data->temp_type[channel];
1452 *val = (data->alarms >> bit[channel]) & 1;
1465 w83627ehf_do_read_in(struct w83627ehf_data *data, u32 attr,
1470 *val = in_from_reg(data->in[channel], channel, data->scale_in);
1473 *val = in_from_reg(data->in_min[channel], channel,
1474 data->scale_in);
1477 *val = in_from_reg(data->in_max[channel], channel,
1478 data->scale_in);
1483 *val = (data->alarms >> bit[channel]) & 1;
1494 w83627ehf_do_read_fan(struct w83627ehf_data *data, u32 attr,
1499 *val = data->rpm[channel];
1502 *val = fan_from_reg8(data->fan_min[channel],
1503 data->fan_div[channel]);
1506 *val = div_from_reg(data->fan_div[channel]);
1511 *val = (data->alarms >> bit[channel]) & 1;
1522 w83627ehf_do_read_pwm(struct w83627ehf_data *data, u32 attr,
1527 *val = data->pwm[channel];
1530 *val = data->pwm_enable[channel];
1533 *val = data->pwm_enable[channel];
1542 w83627ehf_do_read_intrusion(struct w83627ehf_data *data, u32 attr,
1548 *val = !!(data->caseopen & 0x10);
1556 struct w83627ehf_data *data = w83627ehf_update_device(dev->parent);
1560 return w83627ehf_do_read_fan(data, attr, channel, val);
1563 return w83627ehf_do_read_in(data, attr, channel, val);
1566 return w83627ehf_do_read_pwm(data, attr, channel, val);
1569 return w83627ehf_do_read_temp(data, attr, channel, val);
1572 return w83627ehf_do_read_intrusion(data, attr, channel, val);
1585 struct w83627ehf_data *data = dev_get_drvdata(dev);
1590 *str = data->temp_label[data->temp_src[channel]];
1606 struct w83627ehf_data *data = dev_get_drvdata(dev);
1609 return store_in_min(dev, data, channel, val);
1611 return store_in_max(dev, data, channel, val);
1614 return store_fan_min(dev, data, channel, val);
1617 return store_temp_max(dev, data, channel, val);
1619 return store_temp_max_hyst(dev, data, channel, val);
1621 return store_temp_offset(dev, data, channel, val);
1624 return store_pwm_mode(dev, data, channel, val);
1626 return store_pwm_enable(dev, data, channel, val);
1628 return store_pwm(dev, data, channel, val);
1631 return clear_caseopen(dev, data, channel, val);
1699 struct w83627ehf_data *data;
1709 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
1710 if (!data)
1713 data->addr = res->start;
1714 mutex_init(&data->lock);
1715 mutex_init(&data->update_lock);
1716 data->name = w83627ehf_device_names[sio_data->kind];
1717 data->bank = 0xff; /* Force initial bank selection */
1718 platform_set_drvdata(pdev, data);
1721 data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1725 data->pwm_num = 4;
1729 data->pwm_num = 3;
1732 data->pwm_num = 2;
1737 data->have_temp = 0x07;
1743 w83627ehf_set_temp_reg_ehf(data, 4);
1749 reg = w83627ehf_read_value(data, 0x4a);
1750 data->temp_src[0] = reg >> 5;
1751 reg = w83627ehf_read_value(data, 0x49);
1752 data->temp_src[1] = reg & 0x07;
1753 data->temp_src[2] = (reg >> 4) & 0x07;
1761 reg = w83627ehf_read_value(data, 0x7d);
1763 if (reg != data->temp_src[0] && reg != data->temp_src[1]
1764 && reg != data->temp_src[2]) {
1765 data->temp_src[3] = reg;
1766 data->have_temp |= 1 << 3;
1773 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
1774 if (data->temp_src[2] == 2 && (reg & 0x01))
1775 data->have_temp &= ~(1 << 2);
1777 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
1778 || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
1779 data->in6_skip = 1;
1781 data->temp_label = w83667hg_b_temp_label;
1782 data->have_temp_offset = data->have_temp & 0x07;
1784 if (data->temp_src[i] > 2)
1785 data->have_temp_offset &= ~(1 << i);
1790 w83627ehf_set_temp_reg_ehf(data, 3);
1796 data->temp_src[0] = 0; /* SYSTIN */
1797 reg = w83627ehf_read_value(data, 0x49) & 0x07;
1800 data->temp_src[1] = 1;
1802 data->temp_src[1] = reg + 2;
1804 data->have_temp &= ~(1 << 1);
1805 reg = w83627ehf_read_value(data, 0x4a);
1806 data->temp_src[2] = reg >> 5;
1812 if (data->temp_src[2] == 2 || data->temp_src[2] == 3 ||
1813 data->temp_src[2] == data->temp_src[0] ||
1814 ((data->have_temp & (1 << 1)) &&
1815 data->temp_src[2] == data->temp_src[1]))
1816 data->have_temp &= ~(1 << 2);
1818 data->temp3_val_only = 1; /* No limit regs */
1820 data->in6_skip = 1; /* No VIN3 */
1822 data->temp_label = w83667hg_b_temp_label;
1823 data->have_temp_offset = data->have_temp & 0x03;
1825 if (data->temp_src[i] > 1)
1826 data->have_temp_offset &= ~(1 << i);
1829 w83627ehf_set_temp_reg_ehf(data, 3);
1840 reg = w83627ehf_read_value(data,
1843 data->have_temp &= ~(1 << 2);
1845 data->in6_skip = 1;
1847 data->have_temp_offset = data->have_temp & 0x07;
1851 data->REG_FAN_MAX_OUTPUT =
1853 data->REG_FAN_STEP_OUTPUT =
1856 data->REG_FAN_MAX_OUTPUT =
1858 data->REG_FAN_STEP_OUTPUT =
1864 data->scale_in = scale_in_w83627uhg;
1866 data->scale_in = scale_in_common;
1869 w83627ehf_init_device(data, sio_data->kind);
1871 data->vrm = vid_which_vrm();
1885 data->vid = superio_inb(sio_data->sioreg, 0xe3);
1886 data->have_vid = true;
1900 if ((en_vrm10 & 0x08) && data->vrm == 90) {
1907 && data->vrm == 100) {
1916 data->vid = superio_inb(sio_data->sioreg,
1919 data->vid &= 0x3f;
1920 data->have_vid = true;
1927 w83627ehf_check_fan_inputs(sio_data, data);
1932 w83627ehf_update_fan_div(data);
1934 /* Read pwm data to save original values */
1935 w83627ehf_update_pwm(data);
1936 for (i = 0; i < data->pwm_num; i++)
1937 data->pwm_enable_orig[i] = data->pwm_enable[i];
1940 data->name,
1941 data,
1949 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1951 mutex_lock(&data->update_lock);
1952 data->vbat = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1953 mutex_unlock(&data->update_lock);
1960 struct w83627ehf_data *data = dev_get_drvdata(dev);
1963 mutex_lock(&data->update_lock);
1964 data->bank = 0xff; /* Force initial bank selection */
1967 for (i = 0; i < data->in_num; i++) {
1968 if ((i == 6) && data->in6_skip)
1971 w83627ehf_write_value(data, W83627EHF_REG_IN_MIN(i),
1972 data->in_min[i]);
1973 w83627ehf_write_value(data, W83627EHF_REG_IN_MAX(i),
1974 data->in_max[i]);
1978 if (!(data->has_fan_min & (1 << i)))
1981 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[i],
1982 data->fan_min[i]);
1986 if (!(data->have_temp & (1 << i)))
1989 if (data->reg_temp_over[i])
1990 w83627ehf_write_temp(data, data->reg_temp_over[i],
1991 data->temp_max[i]);
1992 if (data->reg_temp_hyst[i])
1993 w83627ehf_write_temp(data, data->reg_temp_hyst[i],
1994 data->temp_max_hyst[i]);
1997 if (data->have_temp_offset & (1 << i))
1998 w83627ehf_write_value(data,
2000 data->temp_offset[i]);
2004 w83627ehf_write_value(data, W83627EHF_REG_VBAT, data->vbat);
2007 data->valid = false;
2008 mutex_unlock(&data->update_lock);