Lines Matching refs:reg
920 static unsigned int step_time_from_reg(u8 reg, u8 mode)
922 return mode ? 400 * reg : 100 * reg;
931 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
933 if (reg == 0 || reg == 255)
935 return 1350000U / (reg << divreg);
938 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
940 if ((reg & 0xff1f) == 0xff1f)
943 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
945 if (reg == 0)
948 return 1350000U / reg;
951 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
953 if (reg == 0 || reg == 0xffff)
960 return 1350000U / (reg << divreg);
963 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg)
965 return reg;
977 div_from_reg(u8 reg)
979 return BIT(reg);
1002 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scales)
1004 return DIV_ROUND_CLOSEST(reg * scales[nr], 100);
1013 static inline unsigned int tsi_temp_from_reg(unsigned int reg)
1015 return (reg >> 5) * 125;
1151 bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg)
1155 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1156 (reg >= 0x59 && reg < 0x69 && (reg & 1)) ||
1157 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1158 reg == 0x111 || reg == 0x121 || reg == 0x131;
1160 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1161 reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b ||
1162 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 ||
1163 reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 ||
1164 reg == 0x191 || reg == 0x1a1;
1166 return (((reg & 0xff00) == 0x100 ||
1167 (reg & 0xff00) == 0x200) &&
1168 ((reg & 0x00ff) == 0x50 ||
1169 (reg & 0x00ff) == 0x53 ||
1170 (reg & 0x00ff) == 0x55)) ||
1171 (reg & 0xfff0) == 0x630 ||
1172 reg == 0x640 || reg == 0x642 ||
1173 reg == 0x662 || reg == 0x669 ||
1174 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1175 reg == 0x73 || reg == 0x75 || reg == 0x77;
1177 return (((reg & 0xff00) == 0x100 ||
1178 (reg & 0xff00) == 0x200) &&
1179 ((reg & 0x00ff) == 0x50 ||
1180 (reg & 0x00ff) == 0x53 ||
1181 (reg & 0x00ff) == 0x55)) ||
1182 (reg & 0xfff0) == 0x630 ||
1183 reg == 0x402 ||
1184 (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1185 reg == 0x640 || reg == 0x642 ||
1186 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1187 reg == 0x73 || reg == 0x75 || reg == 0x77;
1197 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1198 (reg & 0xfff0) == 0x4c0 ||
1199 reg == 0x402 ||
1200 (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1201 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1202 reg == 0x640 || reg == 0x642 || reg == 0x64a ||
1203 reg == 0x64c ||
1204 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1205 reg == 0x7b || reg == 0x7d;
1212 static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val)
1216 err = nct6775_read_value(data, reg, val);
1220 if (!nct6775_reg_is_word_sized(data, reg))
1229 u16 reg;
1234 err = nct6775_read_value(data, fandiv_reg, ®);
1237 reg &= 0x70 >> oddshift;
1238 reg |= (data->fan_div[nr] & 0x7) << oddshift;
1239 return nct6775_write_value(data, fandiv_reg, reg);
1308 u16 reg;
1322 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®);
1325 if (!reg) {
1338 struct nct6775_data *data, int nr, u16 reg)
1352 if (reg == 0x00 && fan_div < 0x07)
1354 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1395 u16 fanmodecfg, reg;
1402 err = nct6775_read_value(data, data->REG_PWM_MODE[i], ®);
1405 duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]);
1413 err = nct6775_read_value(data, data->REG_PWM[j][i], ®);
1416 data->pwm[j][i] = reg;
1431 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®);
1434 t |= (reg & 0x70) >> 1;
1439 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], ®);
1442 data->temp_tolerance[1][i] = reg;
1444 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], ®);
1447 data->pwm_temp_sel[i] = reg & 0x1f;
1449 if (reg & 0x80)
1455 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], ®);
1458 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1460 if (!(reg & 0x80))
1465 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], ®);
1468 data->weight_temp[j][i] = reg;
1479 u16 reg, reg_t;
1486 err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], ®);
1489 data->fan_time[j][i] = reg;
1503 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®);
1506 reg_t |= (reg & 0x0f) << 8;
1512 err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), ®);
1515 data->auto_pwm[i][j] = reg;
1517 err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), ®);
1520 data->auto_temp[i][j] = reg;
1524 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], ®);
1527 data->auto_temp[i][data->auto_pwm_num] = reg;
1531 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], ®);
1535 (reg & 0x02) ? 0xff : 0x00;
1551 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], ®);
1554 if (reg & data->CRITICAL_PWM_ENABLE_MASK) {
1555 err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], ®);
1559 reg = 0xff;
1561 data->auto_pwm[i][data->auto_pwm_num] = reg;
1573 u16 reg;
1589 err = nct6775_read_value(data, data->REG_VIN[i], ®);
1592 data->in[i][0] = reg;
1594 err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®);
1597 data->in[i][1] = reg;
1599 err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], ®);
1602 data->in[i][2] = reg;
1610 err = nct6775_read_value(data, data->REG_FAN[i], ®);
1613 data->rpm[i] = data->fan_from_reg(reg,
1634 err = nct6775_select_fan_div(dev, data, i, reg);
1653 err = nct6775_read_temp(data, data->reg_temp[j][i], ®);
1656 data->temp[j][i] = reg;
1662 err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], ®);
1665 data->temp_offset[i] = reg;
1671 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], ®);
1674 data->tsi_temp[i] = reg;
2002 unsigned int reg;
2031 reg = 1350000U / val;
2032 if (reg >= 128 * 255) {
2042 } else if (!reg) {
2059 while (reg > 192 && new_div < 7) {
2060 reg >>= 1;
2063 data->fan_min[nr] = reg;
2113 u16 reg;
2124 err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], ®);
2127 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2128 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2129 err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2483 u16 reg;
2501 err = nct6775_read_value(data, data->REG_PWM_MODE[nr], ®);
2504 reg &= ~data->PWM_MODE_MASK[nr];
2506 reg |= data->PWM_MODE_MASK[nr];
2507 err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2554 u16 reg;
2574 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®);
2577 reg &= 0x7f;
2579 reg |= 0x80;
2580 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2613 u16 reg;
2621 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2624 reg = (reg & ~data->tolerance_mask) |
2626 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2634 reg = (data->target_speed[nr] >> 8) & 0x0f;
2635 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2636 err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg);
2647 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2650 reg = (reg & ~data->tolerance_mask) |
2652 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2682 u16 reg;
2714 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2717 reg &= 0x0f;
2718 reg |= pwm_enable_to_reg(val) << 4;
2719 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2764 u16 reg;
2780 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®);
2783 reg &= 0xe0;
2784 reg |= src;
2785 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2816 u16 reg;
2835 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®);
2838 reg &= 0xe0;
2839 reg |= (src | 0x80);
2840 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2843 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®);
2846 reg &= 0x7f;
2847 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
3169 u16 reg;
3193 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], ®);
3197 reg |= 0x02;
3199 reg &= ~0x02;
3200 err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg);
3218 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], ®);
3222 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3224 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3225 err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg);