Lines Matching refs:data
546 * ISA access is performed through an index/data register pair and needs to
548 * We use data->update_lock for this and need to ensure that we acquire it
552 static u8 dme1737_read(const struct dme1737_data *data, u8 reg)
554 struct i2c_client *client = data->client;
566 outb(reg, data->addr);
567 val = inb(data->addr + 1);
573 static s32 dme1737_write(const struct dme1737_data *data, u8 reg, u8 val)
575 struct i2c_client *client = data->client;
587 outb(reg, data->addr);
588 outb(val, data->addr + 1);
596 struct dme1737_data *data = dev_get_drvdata(dev);
600 mutex_lock(&data->update_lock);
603 if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) {
604 dme1737_write(data, DME1737_REG_CONFIG, dme1737_read(data,
606 data->last_vbat = jiffies;
610 if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
611 if (data->has_features & HAS_VID) {
612 data->vid = dme1737_read(data, DME1737_REG_VID) &
617 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
623 if (ix == 7 && !(data->has_features & HAS_IN7))
625 data->in[ix] = dme1737_read(data,
627 data->in_min[ix] = dme1737_read(data,
629 data->in_max[ix] = dme1737_read(data,
634 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
642 data->temp[ix] = dme1737_read(data,
644 data->temp_min[ix] = dme1737_read(data,
646 data->temp_max[ix] = dme1737_read(data,
648 if (data->has_features & HAS_TEMP_OFFSET) {
649 data->temp_offset[ix] = dme1737_read(data,
661 if (ix == 5 && !(data->has_features & HAS_IN7))
663 lsb[ix] = dme1737_read(data,
666 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
667 if (ix == 7 && !(data->has_features & HAS_IN7))
669 data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] <<
672 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
673 data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] <<
678 for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) {
683 if (!(data->has_features & HAS_FAN(ix)))
685 data->fan[ix] = dme1737_read(data,
687 data->fan[ix] |= dme1737_read(data,
689 data->fan_min[ix] = dme1737_read(data,
691 data->fan_min[ix] |= dme1737_read(data,
693 data->fan_opt[ix] = dme1737_read(data,
697 data->fan_max[ix - 4] = dme1737_read(data,
703 for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) {
708 if (!(data->has_features & HAS_PWM(ix)))
710 data->pwm[ix] = dme1737_read(data,
712 data->pwm_freq[ix] = dme1737_read(data,
716 data->pwm_config[ix] = dme1737_read(data,
718 data->pwm_min[ix] = dme1737_read(data,
722 for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) {
723 data->pwm_rr[ix] = dme1737_read(data,
728 for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) {
730 if ((ix == 2) && !(data->has_features & HAS_ZONE3))
733 if ((ix == 1) && (data->type == sch5127)) {
734 data->zone_low[1] = dme1737_read(data,
736 data->zone_abs[1] = dme1737_read(data,
739 data->zone_low[ix] = dme1737_read(data,
741 data->zone_abs[ix] = dme1737_read(data,
745 if (data->has_features & HAS_ZONE_HYST) {
746 for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
747 data->zone_hyst[ix] = dme1737_read(data,
753 data->alarms = dme1737_read(data,
759 if (data->alarms & 0x80) {
760 data->alarms |= dme1737_read(data,
762 data->alarms |= dme1737_read(data,
771 if (!data->client) {
772 if (data->alarms & 0xff0000)
773 dme1737_write(data, DME1737_REG_ALARM3, 0xff);
774 if (data->alarms & 0xff00)
775 dme1737_write(data, DME1737_REG_ALARM2, 0xff);
776 if (data->alarms & 0xff)
777 dme1737_write(data, DME1737_REG_ALARM1, 0xff);
780 data->last_update = jiffies;
781 data->valid = true;
784 mutex_unlock(&data->update_lock);
786 return data;
802 struct dme1737_data *data = dme1737_update_device(dev);
811 res = IN_FROM_REG(data->in[ix], data->in_nominal[ix], 16);
814 res = IN_FROM_REG(data->in_min[ix], data->in_nominal[ix], 8);
817 res = IN_FROM_REG(data->in_max[ix], data->in_nominal[ix], 8);
820 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
833 struct dme1737_data *data = dev_get_drvdata(dev);
845 mutex_lock(&data->update_lock);
848 data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]);
849 dme1737_write(data, DME1737_REG_IN_MIN(ix),
850 data->in_min[ix]);
853 data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]);
854 dme1737_write(data, DME1737_REG_IN_MAX(ix),
855 data->in_max[ix]);
860 mutex_unlock(&data->update_lock);
880 struct dme1737_data *data = dme1737_update_device(dev);
889 res = TEMP_FROM_REG(data->temp[ix], 16);
892 res = TEMP_FROM_REG(data->temp_min[ix], 8);
895 res = TEMP_FROM_REG(data->temp_max[ix], 8);
898 res = TEMP_FROM_REG(data->temp_offset[ix], 8);
901 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01;
904 res = (((u16)data->temp[ix] & 0xff00) == 0x8000);
917 struct dme1737_data *data = dev_get_drvdata(dev);
929 mutex_lock(&data->update_lock);
932 data->temp_min[ix] = TEMP_TO_REG(val);
933 dme1737_write(data, DME1737_REG_TEMP_MIN(ix),
934 data->temp_min[ix]);
937 data->temp_max[ix] = TEMP_TO_REG(val);
938 dme1737_write(data, DME1737_REG_TEMP_MAX(ix),
939 data->temp_max[ix]);
942 data->temp_offset[ix] = TEMP_TO_REG(val);
943 dme1737_write(data, DME1737_REG_TEMP_OFFSET(ix),
944 data->temp_offset[ix]);
949 mutex_unlock(&data->update_lock);
968 struct dme1737_data *data = dme1737_update_device(dev);
978 if ((ix == 1) && (data->config2 & 0x02))
984 res = TEMP_FROM_REG(data->zone_low[ix], 8) -
985 TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix);
988 res = TEMP_FROM_REG(data->zone_low[ix], 8);
992 res = TEMP_FROM_REG(data->zone_low[ix], 8) +
993 TEMP_RANGE_FROM_REG(data->pwm_freq[ix]);
996 res = TEMP_FROM_REG(data->zone_abs[ix], 8);
1009 struct dme1737_data *data = dev_get_drvdata(dev);
1023 mutex_lock(&data->update_lock);
1027 data->zone_low[ix] = dme1737_read(data,
1030 temp = TEMP_FROM_REG(data->zone_low[ix], 8);
1031 reg = dme1737_read(data, DME1737_REG_ZONE_HYST(ix == 2));
1032 data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG(temp, val, ix, reg);
1033 dme1737_write(data, DME1737_REG_ZONE_HYST(ix == 2),
1034 data->zone_hyst[ix == 2]);
1037 data->zone_low[ix] = TEMP_TO_REG(val);
1038 dme1737_write(data, DME1737_REG_ZONE_LOW(ix),
1039 data->zone_low[ix]);
1043 data->zone_low[ix] = dme1737_read(data,
1049 temp = TEMP_FROM_REG(data->zone_low[ix], 8);
1051 reg = dme1737_read(data, DME1737_REG_PWM_FREQ(ix));
1052 data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - temp, reg);
1053 dme1737_write(data, DME1737_REG_PWM_FREQ(ix),
1054 data->pwm_freq[ix]);
1057 data->zone_abs[ix] = TEMP_TO_REG(val);
1058 dme1737_write(data, DME1737_REG_ZONE_ABS(ix),
1059 data->zone_abs[ix]);
1064 mutex_unlock(&data->update_lock);
1083 struct dme1737_data *data = dme1737_update_device(dev);
1092 res = FAN_FROM_REG(data->fan[ix],
1094 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1097 res = FAN_FROM_REG(data->fan_min[ix],
1099 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1103 res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]);
1106 res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01;
1110 res = FAN_TYPE_FROM_REG(data->fan_opt[ix]);
1123 struct dme1737_data *data = dev_get_drvdata(dev);
1135 mutex_lock(&data->update_lock);
1139 data->fan_min[ix] = FAN_TO_REG(val, 0);
1142 data->fan_opt[ix] = dme1737_read(data,
1145 data->fan_min[ix] = FAN_TO_REG(val,
1146 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1148 dme1737_write(data, DME1737_REG_FAN_MIN(ix),
1149 data->fan_min[ix] & 0xff);
1150 dme1737_write(data, DME1737_REG_FAN_MIN(ix) + 1,
1151 data->fan_min[ix] >> 8);
1155 data->fan_max[ix - 4] = FAN_MAX_TO_REG(val);
1156 dme1737_write(data, DME1737_REG_FAN_MAX(ix),
1157 data->fan_max[ix - 4]);
1168 data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(data,
1170 dme1737_write(data, DME1737_REG_FAN_OPT(ix),
1171 data->fan_opt[ix]);
1177 mutex_unlock(&data->update_lock);
1199 struct dme1737_data *data = dme1737_update_device(dev);
1208 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0)
1211 res = data->pwm[ix];
1214 res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]);
1220 res = PWM_EN_FROM_REG(data->pwm_config[ix]);
1224 res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix);
1228 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2)
1229 res = PWM_ACZ_FROM_REG(data->pwm_config[ix]);
1231 res = data->pwm_acz[ix];
1235 if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix))
1236 res = data->pwm_min[ix];
1242 res = data->pwm_min[ix];
1262 struct dme1737_data *data = dev_get_drvdata(dev);
1274 mutex_lock(&data->update_lock);
1277 data->pwm[ix] = clamp_val(val, 0, 255);
1278 dme1737_write(data, DME1737_REG_PWM(ix), data->pwm[ix]);
1281 data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(data,
1283 dme1737_write(data, DME1737_REG_PWM_FREQ(ix),
1284 data->pwm_freq[ix]);
1296 data->pwm_config[ix] = dme1737_read(data,
1298 if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) {
1303 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1305 data->pwm_acz[ix] = PWM_ACZ_FROM_REG(
1306 data->pwm_config[ix]);
1308 data->pwm_rr[ix > 0] = dme1737_read(data,
1310 data->pwm_rr_en &= ~(1 << ix);
1311 if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) {
1312 data->pwm_rr_en |= (1 << ix);
1313 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix,
1314 data->pwm_rr[ix > 0]);
1315 dme1737_write(data,
1317 data->pwm_rr[ix > 0]);
1327 data->pwm_config[ix] = PWM_EN_TO_REG(0,
1328 data->pwm_config[ix]);
1329 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
1330 data->pwm_config[ix]);
1334 data->pwm_config[ix] = PWM_EN_TO_REG(1,
1335 data->pwm_config[ix]);
1336 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
1337 data->pwm_config[ix]);
1350 data->pwm_config[ix] = PWM_ACZ_TO_REG(
1351 data->pwm_acz[ix],
1352 data->pwm_config[ix]);
1353 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
1354 data->pwm_config[ix]);
1356 if (data->pwm_rr_en & (1 << ix)) {
1357 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix,
1358 dme1737_read(data,
1360 dme1737_write(data,
1362 data->pwm_rr[ix > 0]);
1370 data->pwm_config[ix] = dme1737_read(data,
1372 data->pwm_rr[ix > 0] = dme1737_read(data,
1376 data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix,
1377 data->pwm_rr[ix > 0]);
1383 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1384 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix,
1385 data->pwm_rr[ix > 0]);
1387 dme1737_write(data, DME1737_REG_PWM_RR(ix > 0),
1388 data->pwm_rr[ix > 0]);
1401 data->pwm_config[ix] = dme1737_read(data,
1403 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1408 data->pwm_config[ix] = PWM_ACZ_TO_REG(val,
1409 data->pwm_config[ix]);
1410 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
1411 data->pwm_config[ix]);
1417 data->pwm_acz[ix] = val;
1423 data->pwm_min[ix] = dme1737_read(data,
1431 if (val > ((data->pwm_min[ix] + 1) / 2)) {
1432 data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix,
1433 dme1737_read(data,
1436 data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix,
1437 dme1737_read(data,
1440 dme1737_write(data, DME1737_REG_PWM_RR(0),
1441 data->pwm_rr[0]);
1445 data->pwm_min[ix] = clamp_val(val, 0, 255);
1446 dme1737_write(data, DME1737_REG_PWM_MIN(ix),
1447 data->pwm_min[ix]);
1453 mutex_unlock(&data->update_lock);
1466 struct dme1737_data *data = i2c_get_clientdata(client);
1468 return sprintf(buf, "%d\n", data->vrm);
1474 struct dme1737_data *data = dev_get_drvdata(dev);
1485 data->vrm = val;
1492 struct dme1737_data *data = dme1737_update_device(dev);
1494 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1500 struct dme1737_data *data = dev_get_drvdata(dev);
1502 return sprintf(buf, "%s\n", data->name);
2064 struct dme1737_data *data = dev_get_drvdata(dev);
2068 if (data->has_features & HAS_FAN(ix)) {
2075 if (data->has_features & HAS_PWM(ix)) {
2078 if ((data->has_features & HAS_PWM_MIN) && ix < 3) {
2085 if (data->has_features & HAS_TEMP_OFFSET)
2087 if (data->has_features & HAS_VID)
2089 if (data->has_features & HAS_ZONE3)
2091 if (data->has_features & HAS_ZONE_HYST)
2093 if (data->has_features & HAS_IN7)
2097 if (!data->client)
2103 struct dme1737_data *data = dev_get_drvdata(dev);
2107 if (!data->client) {
2119 if (data->has_features & HAS_TEMP_OFFSET) {
2125 if (data->has_features & HAS_VID) {
2130 if (data->has_features & HAS_ZONE3) {
2135 if (data->has_features & HAS_ZONE_HYST) {
2140 if (data->has_features & HAS_IN7) {
2148 if (data->has_features & HAS_FAN(ix)) {
2158 if (data->has_features & HAS_PWM(ix)) {
2163 if ((data->has_features & HAS_PWM_MIN) && (ix < 3)) {
2176 if (data->config & 0x02) {
2185 if (data->has_features & HAS_TEMP_OFFSET) {
2189 if (data->has_features & HAS_ZONE3) {
2193 if (data->has_features & HAS_ZONE_HYST) {
2200 if (data->has_features & HAS_PWM(ix)) {
2204 if ((data->has_features & HAS_PWM_MIN) &&
2215 if ((data->has_features & HAS_PWM(ix)) &&
2216 (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) {
2234 struct dme1737_data *data = dev_get_drvdata(dev);
2235 struct i2c_client *client = data->client;
2240 data->in_nominal = IN_NOMINAL(data->type);
2242 data->config = dme1737_read(data, DME1737_REG_CONFIG);
2244 if (!(data->config & 0x01)) {
2252 data->config |= 0x01;
2253 dme1737_write(data, DME1737_REG_CONFIG, data->config);
2256 if (!(data->config & 0x04)) {
2266 data->config2 = dme1737_read(data, DME1737_REG_CONFIG2);
2268 if (data->config2 & 0x04)
2269 data->has_features |= HAS_FAN(2);
2277 data->has_features |= HAS_FAN(3) | HAS_PWM(2);
2285 if (dme1737_i2c_get_features(0x2e, data) &&
2286 dme1737_i2c_get_features(0x4e, data)) {
2293 data->has_features |= HAS_FAN(0) | HAS_FAN(1) | HAS_PWM(0) | HAS_PWM(1);
2296 switch (data->type) {
2298 data->has_features |= HAS_TEMP_OFFSET | HAS_VID | HAS_ZONE3 |
2302 data->has_features |= HAS_TEMP_OFFSET | HAS_ZONE3 |
2306 data->has_features |= HAS_ZONE3;
2309 data->has_features |= HAS_FAN(2) | HAS_PWM(2) | HAS_IN7;
2317 (data->has_features & HAS_PWM(2)) ? "yes" : "no",
2318 (data->has_features & HAS_PWM(4)) ? "yes" : "no",
2319 (data->has_features & HAS_PWM(5)) ? "yes" : "no",
2320 (data->has_features & HAS_FAN(2)) ? "yes" : "no",
2321 (data->has_features & HAS_FAN(3)) ? "yes" : "no",
2322 (data->has_features & HAS_FAN(4)) ? "yes" : "no",
2323 (data->has_features & HAS_FAN(5)) ? "yes" : "no");
2325 reg = dme1737_read(data, DME1737_REG_TACH_PWM);
2345 if (!(data->config & 0x02)) {
2347 data->pwm_config[ix] = dme1737_read(data,
2349 if ((data->has_features & HAS_PWM(ix)) &&
2350 (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) {
2354 data->pwm_config[ix] = PWM_EN_TO_REG(1,
2355 data->pwm_config[ix]);
2356 dme1737_write(data, DME1737_REG_PWM(ix), 0);
2357 dme1737_write(data,
2359 data->pwm_config[ix]);
2365 data->pwm_acz[0] = 1; /* pwm1 -> zone1 */
2366 data->pwm_acz[1] = 2; /* pwm2 -> zone2 */
2367 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */
2370 if (data->has_features & HAS_VID)
2371 data->vrm = vid_which_vrm();
2382 static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data)
2417 data->has_features |= HAS_FAN(5);
2419 data->has_features |= HAS_PWM(5);
2421 data->has_features |= HAS_FAN(4);
2423 data->has_features |= HAS_PWM(4);
2468 struct dme1737_data *data;
2472 data = devm_kzalloc(dev, sizeof(struct dme1737_data), GFP_KERNEL);
2473 if (!data)
2476 i2c_set_clientdata(client, data);
2477 data->type = i2c_match_id(dme1737_id, client)->driver_data;
2478 data->client = client;
2479 data->name = client->name;
2480 mutex_init(&data->update_lock);
2497 data->hwmon_dev = hwmon_device_register(dev);
2498 if (IS_ERR(data->hwmon_dev)) {
2500 err = PTR_ERR(data->hwmon_dev);
2513 struct dme1737_data *data = i2c_get_clientdata(client);
2515 hwmon_device_unregister(data->hwmon_dev);
2573 * Access to the hwmon registers is through an index/data register
2629 struct dme1737_data *data;
2641 data = devm_kzalloc(dev, sizeof(struct dme1737_data), GFP_KERNEL);
2642 if (!data)
2645 data->addr = res->start;
2646 platform_set_drvdata(pdev, data);
2653 data->type = sch311x;
2656 data->type = sch5127;
2659 company = dme1737_read(data, DME1737_REG_COMPANY);
2660 device = dme1737_read(data, DME1737_REG_DEVICE);
2664 data->type = sch311x;
2667 data->type = sch5127;
2673 if (data->type == sch5127)
2674 data->name = "sch5127";
2676 data->name = "sch311x";
2679 mutex_init(&data->update_lock);
2682 data->type == sch5127 ? "SCH5127" : "SCH311x", data->addr);
2699 data->hwmon_dev = hwmon_device_register(dev);
2700 if (IS_ERR(data->hwmon_dev)) {
2702 err = PTR_ERR(data->hwmon_dev);
2715 struct dme1737_data *data = platform_get_drvdata(pdev);
2717 hwmon_device_unregister(data->hwmon_dev);