Lines Matching refs:mipi
131 struct tegra_mipi *mipi;
136 static inline u32 tegra_mipi_readl(struct tegra_mipi *mipi,
139 return readl(mipi->regs + (offset << 2));
142 static inline void tegra_mipi_writel(struct tegra_mipi *mipi, u32 value,
145 writel(value, mipi->regs + (offset << 2));
148 static int tegra_mipi_power_up(struct tegra_mipi *mipi)
153 err = clk_enable(mipi->clk);
157 value = tegra_mipi_readl(mipi, MIPI_CAL_BIAS_PAD_CFG0);
160 if (mipi->soc->needs_vclamp_ref)
163 tegra_mipi_writel(mipi, value, MIPI_CAL_BIAS_PAD_CFG0);
165 value = tegra_mipi_readl(mipi, MIPI_CAL_BIAS_PAD_CFG2);
167 tegra_mipi_writel(mipi, value, MIPI_CAL_BIAS_PAD_CFG2);
169 clk_disable(mipi->clk);
174 static int tegra_mipi_power_down(struct tegra_mipi *mipi)
179 err = clk_enable(mipi->clk);
188 value = tegra_mipi_readl(mipi, MIPI_CAL_BIAS_PAD_CFG2);
190 tegra_mipi_writel(mipi, value, MIPI_CAL_BIAS_PAD_CFG2);
198 value = tegra_mipi_readl(mipi, MIPI_CAL_BIAS_PAD_CFG0);
200 if (mipi->soc->needs_vclamp_ref)
204 tegra_mipi_writel(mipi, value, MIPI_CAL_BIAS_PAD_CFG0);
216 err = of_parse_phandle_with_args(np, "nvidia,mipi-calibrate",
217 "#nvidia,mipi-calibrate-cells", 0,
234 dev->mipi = platform_get_drvdata(dev->pdev);
235 if (!dev->mipi) {
268 mutex_lock(&dev->mipi->lock);
270 if (dev->mipi->usage_count++ == 0)
271 err = tegra_mipi_power_up(dev->mipi);
273 mutex_unlock(&dev->mipi->lock);
284 mutex_lock(&dev->mipi->lock);
286 if (--dev->mipi->usage_count == 0)
287 err = tegra_mipi_power_down(dev->mipi);
289 mutex_unlock(&dev->mipi->lock);
298 struct tegra_mipi *mipi = device->mipi;
299 void __iomem *status_reg = mipi->regs + (MIPI_CAL_STATUS << 2);
307 mutex_unlock(&device->mipi->lock);
308 clk_disable(device->mipi->clk);
316 const struct tegra_mipi_soc *soc = device->mipi->soc;
321 err = clk_enable(device->mipi->clk);
325 mutex_lock(&device->mipi->lock);
329 tegra_mipi_writel(device->mipi, value, MIPI_CAL_BIAS_PAD_CFG1);
331 value = tegra_mipi_readl(device->mipi, MIPI_CAL_BIAS_PAD_CFG2);
336 tegra_mipi_writel(device->mipi, value, MIPI_CAL_BIAS_PAD_CFG2);
351 tegra_mipi_writel(device->mipi, data, soc->pads[i].data);
354 tegra_mipi_writel(device->mipi, clk, soc->pads[i].clk);
357 value = tegra_mipi_readl(device->mipi, MIPI_CAL_CTRL);
368 tegra_mipi_writel(device->mipi, value, MIPI_CAL_CTRL);
371 value = tegra_mipi_readl(device->mipi, MIPI_CAL_STATUS);
372 tegra_mipi_writel(device->mipi, value, MIPI_CAL_STATUS);
374 value = tegra_mipi_readl(device->mipi, MIPI_CAL_CTRL);
376 tegra_mipi_writel(device->mipi, value, MIPI_CAL_CTRL);
493 { .compatible = "nvidia,tegra114-mipi", .data = &tegra114_mipi_soc },
494 { .compatible = "nvidia,tegra124-mipi", .data = &tegra124_mipi_soc },
495 { .compatible = "nvidia,tegra132-mipi", .data = &tegra132_mipi_soc },
496 { .compatible = "nvidia,tegra210-mipi", .data = &tegra210_mipi_soc },
503 struct tegra_mipi *mipi;
510 mipi = devm_kzalloc(&pdev->dev, sizeof(*mipi), GFP_KERNEL);
511 if (!mipi)
514 mipi->soc = match->data;
515 mipi->dev = &pdev->dev;
517 mipi->regs = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
518 if (IS_ERR(mipi->regs))
519 return PTR_ERR(mipi->regs);
521 mutex_init(&mipi->lock);
523 mipi->clk = devm_clk_get(&pdev->dev, NULL);
524 if (IS_ERR(mipi->clk)) {
526 return PTR_ERR(mipi->clk);
529 err = clk_prepare(mipi->clk);
533 platform_set_drvdata(pdev, mipi);
540 struct tegra_mipi *mipi = platform_get_drvdata(pdev);
542 clk_unprepare(mipi->clk);
549 .name = "tegra-mipi",