Lines Matching defs:dpsub
47 return container_of(drm, struct zynqmp_dpsub_drm, dev)->dpsub;
80 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(plane->dev);
81 struct zynqmp_disp_layer *layer = dpsub->layers[plane->index];
89 zynqmp_disp_blend_set_global_alpha(dpsub->disp, false,
98 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(plane->dev);
99 struct zynqmp_disp_layer *layer = dpsub->layers[plane->index];
121 zynqmp_disp_blend_set_global_alpha(dpsub->disp, true,
144 static int zynqmp_dpsub_create_planes(struct zynqmp_dpsub *dpsub)
149 for (i = 0; i < ARRAY_SIZE(dpsub->drm->planes); i++) {
150 struct zynqmp_disp_layer *layer = dpsub->layers[i];
151 struct drm_plane *plane = &dpsub->drm->planes[i];
163 ret = drm_universal_plane_init(&dpsub->drm->dev, plane, 0,
187 return container_of(crtc, struct zynqmp_dpsub_drm, crtc)->dpsub;
193 struct zynqmp_dpsub *dpsub = crtc_to_dpsub(crtc);
197 pm_runtime_get_sync(dpsub->dev);
199 zynqmp_disp_setup_clock(dpsub->disp, adjusted_mode->clock * 1000);
201 ret = clk_prepare_enable(dpsub->vid_clk);
203 dev_err(dpsub->dev, "failed to enable a pixel clock\n");
204 pm_runtime_put_sync(dpsub->dev);
208 zynqmp_disp_enable(dpsub->disp);
219 struct zynqmp_dpsub *dpsub = crtc_to_dpsub(crtc);
231 zynqmp_disp_disable(dpsub->disp);
242 clk_disable_unprepare(dpsub->vid_clk);
243 pm_runtime_put_sync(dpsub->dev);
288 struct zynqmp_dpsub *dpsub = crtc_to_dpsub(crtc);
290 zynqmp_dp_enable_vblank(dpsub->dp);
297 struct zynqmp_dpsub *dpsub = crtc_to_dpsub(crtc);
299 zynqmp_dp_disable_vblank(dpsub->dp);
313 static int zynqmp_dpsub_create_crtc(struct zynqmp_dpsub *dpsub)
315 struct drm_plane *plane = &dpsub->drm->planes[ZYNQMP_DPSUB_LAYER_GFX];
316 struct drm_crtc *crtc = &dpsub->drm->crtc;
319 ret = drm_crtc_init_with_planes(&dpsub->drm->dev, crtc, plane,
332 static void zynqmp_dpsub_map_crtc_to_plane(struct zynqmp_dpsub *dpsub)
334 u32 possible_crtcs = drm_crtc_mask(&dpsub->drm->crtc);
337 for (i = 0; i < ARRAY_SIZE(dpsub->drm->planes); i++)
338 dpsub->drm->planes[i].possible_crtcs = possible_crtcs;
343 * @dpsub: DisplayPort subsystem
348 void zynqmp_dpsub_drm_handle_vblank(struct zynqmp_dpsub *dpsub)
350 drm_crtc_handle_vblank(&dpsub->drm->crtc);
361 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm);
365 args->pitch = ALIGN(pitch, dpsub->dma_align);
374 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm);
380 cmd.pitches[i] = ALIGN(cmd.pitches[i], dpsub->dma_align);
405 .name = "zynqmp-dpsub",
412 static int zynqmp_dpsub_kms_init(struct zynqmp_dpsub *dpsub)
414 struct drm_encoder *encoder = &dpsub->drm->encoder;
419 ret = zynqmp_dpsub_create_planes(dpsub);
423 ret = zynqmp_dpsub_create_crtc(dpsub);
427 zynqmp_dpsub_map_crtc_to_plane(dpsub);
430 encoder->possible_crtcs |= drm_crtc_mask(&dpsub->drm->crtc);
431 drm_simple_encoder_init(&dpsub->drm->dev, encoder, DRM_MODE_ENCODER_NONE);
433 ret = drm_bridge_attach(encoder, dpsub->bridge, NULL,
436 dev_err(dpsub->dev, "failed to attach bridge to encoder\n");
441 connector = drm_bridge_connector_init(&dpsub->drm->dev, encoder);
443 dev_err(dpsub->dev, "failed to created connector\n");
449 dev_err(dpsub->dev, "failed to attach connector to encoder\n");
460 zynqmp_dpsub_release(dpdrm->dpsub);
463 int zynqmp_dpsub_drm_init(struct zynqmp_dpsub *dpsub)
472 * dpsub->drm will remain NULL, which tells the caller that it must
475 dpdrm = devm_drm_dev_alloc(dpsub->dev, &zynqmp_dpsub_drm_driver,
480 dpdrm->dpsub = dpsub;
487 dpsub->drm = dpdrm;
506 ret = zynqmp_dpsub_kms_init(dpsub);
527 void zynqmp_dpsub_drm_cleanup(struct zynqmp_dpsub *dpsub)
529 struct drm_device *drm = &dpsub->drm->dev;