Lines Matching refs:vmw
140 * struct vmw-resource - base class for hardware resources
776 bool vmwgfx_supported(struct vmw_private *vmw);
857 int vmw_gem_object_create(struct vmw_private *vmw,
888 extern bool vmw_cmd_supported(struct vmw_private *vmw);
1455 static inline u32 vmw_fifo_mem_read(struct vmw_private *vmw, uint32 fifo_reg)
1457 BUG_ON(vmw_is_svga_v3(vmw));
1458 return READ_ONCE(*(vmw->fifo_mem + fifo_reg));
1469 static inline void vmw_fifo_mem_write(struct vmw_private *vmw, u32 fifo_reg,
1472 BUG_ON(vmw_is_svga_v3(vmw));
1473 WRITE_ONCE(*(vmw->fifo_mem + fifo_reg), value);
1493 static inline u32 vmw_irq_status_read(struct vmw_private *vmw)
1496 if (vmw_is_svga_v3(vmw))
1497 status = vmw_read(vmw, SVGA_REG_IRQ_STATUS);
1499 status = inl(vmw->io_start + SVGA_IRQSTATUS_PORT);
1503 static inline void vmw_irq_status_write(struct vmw_private *vmw,
1506 if (vmw_is_svga_v3(vmw))
1507 vmw_write(vmw, SVGA_REG_IRQ_STATUS, status);
1509 outl(status, vmw->io_start + SVGA_IRQSTATUS_PORT);
1512 static inline bool vmw_has_fences(struct vmw_private *vmw)
1514 if ((vmw->capabilities & (SVGA_CAP_COMMAND_BUFFERS |
1517 return (vmw_fifo_caps(vmw) & SVGA_FIFO_CAP_FENCE) != 0;