Lines Matching refs:v3d
66 v3d_switch_perfmon(struct v3d_dev *v3d, struct v3d_job *job)
68 if (job->perfmon != v3d->active_perfmon)
69 v3d_perfmon_stop(v3d, v3d->active_perfmon, true);
71 if (job->perfmon && v3d->active_perfmon != job->perfmon)
72 v3d_perfmon_start(v3d, job->perfmon);
78 struct v3d_dev *v3d = job->base.v3d;
79 struct drm_device *dev = &v3d->drm;
89 spin_lock_irqsave(&v3d->job_lock, irqflags);
90 v3d->bin_job = job;
95 spin_unlock_irqrestore(&v3d->job_lock, irqflags);
97 v3d_invalidate_caches(v3d);
99 fence = v3d_fence_create(v3d, V3D_BIN);
110 v3d_switch_perfmon(v3d, &job->base);
133 struct v3d_dev *v3d = job->base.v3d;
134 struct drm_device *dev = &v3d->drm;
140 v3d->render_job = job;
148 v3d_invalidate_caches(v3d);
150 fence = v3d_fence_create(v3d, V3D_RENDER);
161 v3d_switch_perfmon(v3d, &job->base);
178 struct v3d_dev *v3d = job->base.v3d;
179 struct drm_device *dev = &v3d->drm;
182 fence = v3d_fence_create(v3d, V3D_TFU);
186 v3d->tfu_job = job;
215 struct v3d_dev *v3d = job->base.v3d;
216 struct drm_device *dev = &v3d->drm;
220 v3d->csd_job = job;
222 v3d_invalidate_caches(v3d);
224 fence = v3d_fence_create(v3d, V3D_CSD);
234 v3d_switch_perfmon(v3d, &job->base);
248 struct v3d_dev *v3d = job->v3d;
250 v3d_clean_caches(v3d);
256 v3d_gpu_reset_for_timeout(struct v3d_dev *v3d, struct drm_sched_job *sched_job)
260 mutex_lock(&v3d->reset_lock);
264 drm_sched_stop(&v3d->queue[q].sched, sched_job);
270 v3d_reset(v3d);
273 drm_sched_resubmit_jobs(&v3d->queue[q].sched);
277 drm_sched_start(&v3d->queue[q].sched, true);
280 mutex_unlock(&v3d->reset_lock);
295 struct v3d_dev *v3d = job->v3d;
305 return v3d_gpu_reset_for_timeout(v3d, sched_job);
331 return v3d_gpu_reset_for_timeout(job->v3d, sched_job);
338 struct v3d_dev *v3d = job->base.v3d;
349 return v3d_gpu_reset_for_timeout(v3d, sched_job);
383 v3d_sched_init(struct v3d_dev *v3d)
390 ret = drm_sched_init(&v3d->queue[V3D_BIN].sched,
394 NULL, "v3d_bin", v3d->drm.dev);
398 ret = drm_sched_init(&v3d->queue[V3D_RENDER].sched,
402 NULL, "v3d_render", v3d->drm.dev);
406 ret = drm_sched_init(&v3d->queue[V3D_TFU].sched,
410 NULL, "v3d_tfu", v3d->drm.dev);
414 if (v3d_has_csd(v3d)) {
415 ret = drm_sched_init(&v3d->queue[V3D_CSD].sched,
419 NULL, "v3d_csd", v3d->drm.dev);
423 ret = drm_sched_init(&v3d->queue[V3D_CACHE_CLEAN].sched,
427 NULL, "v3d_cache_clean", v3d->drm.dev);
435 v3d_sched_fini(v3d);
440 v3d_sched_fini(struct v3d_dev *v3d)
445 if (v3d->queue[q].sched.ready)
446 drm_sched_fini(&v3d->queue[q].sched);