Lines Matching defs:cirrus
23 #include <video/cirrus.h>
48 #define DRIVER_NAME "cirrus"
49 #define DRIVER_DESC "qemu cirrus vga"
100 static u8 rreg_seq(struct cirrus_device *cirrus, u8 reg)
102 iowrite8(reg, cirrus->mmio + SEQ_INDEX);
103 return ioread8(cirrus->mmio + SEQ_DATA);
106 static void wreg_seq(struct cirrus_device *cirrus, u8 reg, u8 val)
108 iowrite8(reg, cirrus->mmio + SEQ_INDEX);
109 iowrite8(val, cirrus->mmio + SEQ_DATA);
115 static u8 rreg_crt(struct cirrus_device *cirrus, u8 reg)
117 iowrite8(reg, cirrus->mmio + CRT_INDEX);
118 return ioread8(cirrus->mmio + CRT_DATA);
121 static void wreg_crt(struct cirrus_device *cirrus, u8 reg, u8 val)
123 iowrite8(reg, cirrus->mmio + CRT_INDEX);
124 iowrite8(val, cirrus->mmio + CRT_DATA);
130 static void wreg_gfx(struct cirrus_device *cirrus, u8 reg, u8 val)
132 iowrite8(reg, cirrus->mmio + GFX_INDEX);
133 iowrite8(val, cirrus->mmio + GFX_DATA);
138 static void wreg_hdr(struct cirrus_device *cirrus, u8 val)
140 ioread8(cirrus->mmio + VGA_DAC_MASK);
141 ioread8(cirrus->mmio + VGA_DAC_MASK);
142 ioread8(cirrus->mmio + VGA_DAC_MASK);
143 ioread8(cirrus->mmio + VGA_DAC_MASK);
144 iowrite8(val, cirrus->mmio + VGA_DAC_MASK);
178 static void cirrus_set_start_address(struct cirrus_device *cirrus, u32 offset)
184 wreg_crt(cirrus, 0x0c, (u8)((addr >> 8) & 0xff));
185 wreg_crt(cirrus, 0x0d, (u8)(addr & 0xff));
187 tmp = rreg_crt(cirrus, 0x1b);
191 wreg_crt(cirrus, 0x1b, tmp);
193 tmp = rreg_crt(cirrus, 0x1d);
196 wreg_crt(cirrus, 0x1d, tmp);
199 static void cirrus_mode_set(struct cirrus_device *cirrus,
222 wreg_crt(cirrus, VGA_CRTC_V_SYNC_END, 0x20);
223 wreg_crt(cirrus, VGA_CRTC_H_TOTAL, htotal);
224 wreg_crt(cirrus, VGA_CRTC_H_DISP, hdispend);
225 wreg_crt(cirrus, VGA_CRTC_H_SYNC_START, hsyncstart);
226 wreg_crt(cirrus, VGA_CRTC_H_SYNC_END, hsyncend);
227 wreg_crt(cirrus, VGA_CRTC_V_TOTAL, vtotal & 0xff);
228 wreg_crt(cirrus, VGA_CRTC_V_DISP_END, vdispend & 0xff);
233 wreg_crt(cirrus, VGA_CRTC_MAX_SCAN, tmp);
249 wreg_crt(cirrus, VGA_CRTC_OVERFLOW, tmp);
264 wreg_crt(cirrus, CL_CRT1A, tmp);
267 wreg_crt(cirrus, VGA_CRTC_MODE, 0x03);
270 static void cirrus_format_set(struct cirrus_device *cirrus,
275 sr07 = rreg_seq(cirrus, 0x07);
299 wreg_seq(cirrus, 0x7, sr07);
302 wreg_gfx(cirrus, VGA_GFX_MODE, 0x40);
305 wreg_gfx(cirrus, VGA_GFX_MISC, 0x01);
307 wreg_hdr(cirrus, hdr);
310 static void cirrus_pitch_set(struct cirrus_device *cirrus, unsigned int pitch)
316 wreg_crt(cirrus, VGA_CRTC_OFFSET, cr13);
322 wreg_crt(cirrus, 0x1b, cr1b);
324 cirrus_set_start_address(cirrus, 0);
328 /* cirrus display pipe */
382 struct cirrus_device *cirrus = to_cirrus(plane->dev);
393 struct iosys_map vaddr = IOSYS_MAP_INIT_VADDR_IOMEM(cirrus->vram);
401 if (!drm_dev_enter(&cirrus->dev, &idx))
405 cirrus_format_set(cirrus, format);
407 cirrus_pitch_set(cirrus, pitch);
502 struct cirrus_device *cirrus = to_cirrus(crtc->dev);
506 if (!drm_dev_enter(&cirrus->dev, &idx))
509 cirrus_mode_set(cirrus, &crtc_state->mode);
558 static int cirrus_pipe_init(struct cirrus_device *cirrus)
560 struct drm_device *dev = &cirrus->dev;
567 primary_plane = &cirrus->primary_plane;
579 crtc = &cirrus->crtc;
586 encoder = &cirrus->encoder;
593 connector = &cirrus->connector;
608 /* cirrus framebuffers & mode config */
629 static int cirrus_mode_config_init(struct cirrus_device *cirrus)
631 struct drm_device *dev = &cirrus->dev;
670 struct cirrus_device *cirrus;
686 cirrus = devm_drm_dev_alloc(&pdev->dev, &cirrus_driver,
688 if (IS_ERR(cirrus))
689 return PTR_ERR(cirrus);
691 dev = &cirrus->dev;
693 cirrus->vram = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 0),
695 if (cirrus->vram == NULL)
698 cirrus->mmio = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 1),
700 if (cirrus->mmio == NULL)
703 ret = cirrus_mode_config_init(cirrus);
707 ret = cirrus_pipe_init(cirrus);
734 /* only bind to the cirrus chip in qemu */