Lines Matching defs:mode
1001 /* wake up in normal mode */
1152 const struct drm_display_mode *mode,
1157 const u64 pclk = (u64)mode->clock * 1000;
1174 params.num_clocks = div_u64(link_rate * mode->hdisplay, pclk);
1209 num_syms_per_line = (mode->hdisplay * config->bits_per_pixel) *
1224 num = ((mode->htotal - mode->hdisplay) - 7) * link_rate;
1233 num = (mode->hdisplay - 25) * link_rate;
1284 const struct drm_display_mode *mode,
1299 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
1302 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
1305 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
1308 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
1344 value = ((mode->vtotal & 0x7fff) << 16) | (mode->htotal & 0x7fff);
1348 vse = mode->vsync_end - mode->vsync_start - 1;
1349 hse = mode->hsync_end - mode->hsync_start - 1;
1355 vbe = vse + (mode->vtotal - mode->vsync_end);
1356 hbe = hse + (mode->htotal - mode->hsync_end);
1362 vbs = vbe + mode->vdisplay;
1363 hbs = hbe + mode->hdisplay;
1376 /* switch to safe mode */
1789 struct drm_display_mode *mode)
1807 unsigned long pclk = crtc_state->mode.clock * 1000;
1912 const struct drm_display_mode *mode)
1927 &sor->output.connector, mode);
2191 struct drm_display_mode *mode;
2193 mode = &sor->output.encoder.crtc->state->adjusted_mode;
2195 if (mode->clock >= 340000 && scdc->supported) {
2251 struct drm_display_mode *mode;
2258 mode = &encoder->crtc->state->adjusted_mode;
2259 pclk = mode->clock * 1000;
2339 if (mode->clock < 340000) {
2422 if (mode->clock >= 340000)
2425 DRM_DEBUG_KMS("setting clock to %lu Hz, mode: %lu Hz\n", rate, pclk);
2433 if (mode->clock < 75000)
2439 max_ac = ((mode->htotal - mode->hdisplay) - SOR_REKEY - 18) / 32;
2448 (mode->hsync_end - mode->hsync_start) +
2449 (mode->htotal - mode->hsync_end) - 10;
2464 err = tegra_sor_hdmi_setup_avi_infoframe(sor, mode);
2483 settings = tegra_sor_hdmi_find_settings(sor, mode->clock * 1000);
2486 mode->clock * 1000);
2604 tegra_sor_mode_set(sor, mode, state);
2721 struct drm_display_mode *mode;
2728 mode = &encoder->crtc->state->adjusted_mode;
2758 err = drm_dp_link_choose(&sor->link, mode, info);
2890 err = tegra_sor_compute_config(sor, mode, &config, &sor->link);
2895 tegra_sor_mode_set(sor, mode, state);