Lines Matching defs:clk
7 #include <linux/clk.h>
1405 copy->clk = state->clk;
1840 * @clk: parent clock for display controller
1849 struct clk *clk, unsigned long pclk,
1854 if (!clk_has_parent(dc->clk, clk))
1857 state->clk = clk;
1875 rate = DIV_ROUND_UP(clk_get_rate(dc->clk) * 2, state->div + 2);
1915 err = clk_set_parent(dc->clk, state->clk);
1928 err = clk_set_rate(state->clk, state->pclk);
1934 err = clk_set_rate(dc->clk, state->pclk);
1937 dc->clk, state->pclk, err);
1940 DRM_DEBUG_KMS("rate: %lu, div: %u\n", clk_get_rate(dc->clk),
2769 clk_disable_unprepare(dc->clk);
2788 err = tegra_powergate_sequence_power_up(dc->powergate, dc->clk,
2795 err = clk_prepare_enable(dc->clk);
2811 clk_disable_unprepare(dc->clk);
3187 dc->clk = devm_clk_get(&pdev->dev, NULL);
3188 if (IS_ERR(dc->clk)) {
3190 return PTR_ERR(dc->clk);
3200 err = clk_prepare_enable(dc->clk);
3208 clk_disable_unprepare(dc->clk);
3214 clk_disable_unprepare(dc->clk);