Lines Matching defs:hqvdp
31 #define HQVDP_FMW_NAME "hqvdp-stih407.bin"
333 * @plane: plane structure for hqvdp it self
370 * @hqvdp: hqvdp structure
378 static int sti_hqvdp_get_free_cmd(struct sti_hqvdp *hqvdp)
381 u32 cmd = hqvdp->hqvdp_cmd_paddr;
384 curr_cmd = readl(hqvdp->regs + HQVDP_MBX_CURRENT_CMD);
385 next_cmd = readl(hqvdp->regs + HQVDP_MBX_NEXT_CMD);
398 * @hqvdp: hqvdp structure
406 static int sti_hqvdp_get_curr_cmd(struct sti_hqvdp *hqvdp)
409 u32 cmd = hqvdp->hqvdp_cmd_paddr;
412 curr_cmd = readl(hqvdp->regs + HQVDP_MBX_CURRENT_CMD);
426 * @hqvdp: hqvdp structure
434 static int sti_hqvdp_get_next_cmd(struct sti_hqvdp *hqvdp)
437 dma_addr_t cmd = hqvdp->hqvdp_cmd_paddr;
440 next_cmd = readl(hqvdp->regs + HQVDP_MBX_NEXT_CMD);
453 readl(hqvdp->regs + reg))
568 struct sti_hqvdp *hqvdp = (struct sti_hqvdp *)node->info_ent->data;
573 sti_plane_to_str(&hqvdp->plane), hqvdp->regs);
579 infoxp70 = readl(hqvdp->regs + HQVDP_MBX_INFO_XP70);
592 if (readl(hqvdp->regs + HQVDP_MBX_STARTUP_CTRL1)
598 if (readl(hqvdp->regs + HQVDP_MBX_STARTUP_CTRL2)
607 if (!(readl(hqvdp->regs + HQVDP_MBX_SOFT_VSYNC) & 3))
613 cmd = readl(hqvdp->regs + HQVDP_MBX_CURRENT_CMD);
614 cmd_offset = sti_hqvdp_get_curr_cmd(hqvdp);
618 virt = hqvdp->hqvdp_cmd + cmd_offset;
625 cmd = readl(hqvdp->regs + HQVDP_MBX_NEXT_CMD);
626 cmd_offset = sti_hqvdp_get_next_cmd(hqvdp);
630 virt = hqvdp->hqvdp_cmd + cmd_offset;
641 { "hqvdp", hqvdp_dbg_show, 0, NULL },
644 static void hqvdp_debugfs_init(struct sti_hqvdp *hqvdp, struct drm_minor *minor)
649 hqvdp_debugfs_files[i].data = hqvdp;
715 * @hqvdp: hqvdp pointer
734 static bool sti_hqvdp_check_hw_scaling(struct sti_hqvdp *hqvdp,
742 lfw = mode->htotal * (clk_get_rate(hqvdp->clk) / 1000000);
752 * @hqvdp: hqvdp pointer
756 static void sti_hqvdp_disable(struct sti_hqvdp *hqvdp)
760 DRM_DEBUG_DRIVER("%s\n", sti_plane_to_str(&hqvdp->plane));
763 if (sti_vtg_unregister_client(hqvdp->vtg, &hqvdp->vtg_nb))
767 writel(0, hqvdp->regs + HQVDP_MBX_NEXT_CMD);
770 if (readl(hqvdp->regs + HQVDP_MBX_INFO_XP70)
777 clk_disable_unprepare(hqvdp->clk_pix_main);
782 hqvdp->plane.status = STI_PLANE_DISABLED;
783 hqvdp->vtg_registered = false;
799 struct sti_hqvdp *hqvdp = container_of(nb, struct sti_hqvdp, vtg_nb);
808 if (hqvdp->plane.status == STI_PLANE_FLUSHING) {
811 sti_plane_to_str(&hqvdp->plane));
813 sti_hqvdp_disable(hqvdp);
816 if (hqvdp->btm_field_pending) {
818 btm_cmd_offset = sti_hqvdp_get_free_cmd(hqvdp);
819 top_cmd_offest = sti_hqvdp_get_curr_cmd(hqvdp);
825 btm_cmd = hqvdp->hqvdp_cmd + btm_cmd_offset;
826 top_cmd = hqvdp->hqvdp_cmd + top_cmd_offest;
837 writel(hqvdp->hqvdp_cmd_paddr + btm_cmd_offset,
838 hqvdp->regs + HQVDP_MBX_NEXT_CMD);
840 hqvdp->btm_field_pending = false;
842 dev_dbg(hqvdp->dev, "%s Posted command:0x%x\n",
843 __func__, hqvdp->hqvdp_cmd_paddr);
845 sti_plane_update_fps(&hqvdp->plane, false, true);
851 static void sti_hqvdp_init(struct sti_hqvdp *hqvdp)
856 hqvdp->vtg_nb.notifier_call = sti_hqvdp_vtg_cb;
860 hqvdp->hqvdp_cmd = dma_alloc_wc(hqvdp->dev, size,
863 if (!hqvdp->hqvdp_cmd) {
868 hqvdp->hqvdp_cmd_paddr = (u32)dma_addr;
869 memset(hqvdp->hqvdp_cmd, 0, size);
872 static void sti_hqvdp_init_plugs(struct sti_hqvdp *hqvdp)
875 writel(PLUG_PAGE_SIZE_256, hqvdp->regs + HQVDP_RD_PLUG_PAGE_SIZE);
876 writel(PLUG_MIN_OPC_8, hqvdp->regs + HQVDP_RD_PLUG_MIN_OPC);
877 writel(PLUG_MAX_OPC_64, hqvdp->regs + HQVDP_RD_PLUG_MAX_OPC);
878 writel(PLUG_MAX_CHK_2X, hqvdp->regs + HQVDP_RD_PLUG_MAX_CHK);
879 writel(PLUG_MAX_MSG_1X, hqvdp->regs + HQVDP_RD_PLUG_MAX_MSG);
880 writel(PLUG_MIN_SPACE_1, hqvdp->regs + HQVDP_RD_PLUG_MIN_SPACE);
881 writel(PLUG_CONTROL_ENABLE, hqvdp->regs + HQVDP_RD_PLUG_CONTROL);
883 writel(PLUG_PAGE_SIZE_256, hqvdp->regs + HQVDP_WR_PLUG_PAGE_SIZE);
884 writel(PLUG_MIN_OPC_8, hqvdp->regs + HQVDP_WR_PLUG_MIN_OPC);
885 writel(PLUG_MAX_OPC_64, hqvdp->regs + HQVDP_WR_PLUG_MAX_OPC);
886 writel(PLUG_MAX_CHK_2X, hqvdp->regs + HQVDP_WR_PLUG_MAX_CHK);
887 writel(PLUG_MAX_MSG_1X, hqvdp->regs + HQVDP_WR_PLUG_MAX_MSG);
888 writel(PLUG_MIN_SPACE_1, hqvdp->regs + HQVDP_WR_PLUG_MIN_SPACE);
889 writel(PLUG_CONTROL_ENABLE, hqvdp->regs + HQVDP_WR_PLUG_CONTROL);
894 * @hqvdp: hqvdp pointer
898 static void sti_hqvdp_start_xp70(struct sti_hqvdp *hqvdp)
913 if (hqvdp->xp70_initialized) {
919 if (request_firmware(&firmware, HQVDP_FMW_NAME, hqvdp->dev)) {
955 if (clk_prepare_enable(hqvdp->clk))
959 writel(SW_RESET_CTRL_FULL, hqvdp->regs + HQVDP_MBX_SW_RESET_CTRL);
962 if (readl(hqvdp->regs + HQVDP_MBX_STARTUP_CTRL1)
969 clk_disable_unprepare(hqvdp->clk);
975 writel(fw_rd_plug[i], hqvdp->regs + HQVDP_RD_PLUG + i * 4);
977 writel(fw_wr_plug[i], hqvdp->regs + HQVDP_WR_PLUG + i * 4);
979 sti_hqvdp_init_plugs(hqvdp);
982 writel(STARTUP_CTRL1_AUTH_IDLE, hqvdp->regs + HQVDP_MBX_STARTUP_CTRL1);
985 writel(SOFT_VSYNC_SW_CTRL_IRQ, hqvdp->regs + HQVDP_MBX_SOFT_VSYNC);
986 writel(0, hqvdp->regs + HQVDP_MBX_NEXT_CMD);
990 writel(fw_pmem[i], hqvdp->regs + HQVDP_PMEM + i * 4);
992 writel(fw_dmem[i], hqvdp->regs + HQVDP_DMEM + i * 4);
995 writel(STARTUP_CTRL2_FETCH_EN, hqvdp->regs + HQVDP_MBX_STARTUP_CTRL2);
999 if (readl(hqvdp->regs + HQVDP_MBX_INFO_XP70)
1006 clk_disable_unprepare(hqvdp->clk);
1011 writel(SOFT_VSYNC_HW, hqvdp->regs + HQVDP_MBX_SOFT_VSYNC);
1015 hqvdp->xp70_initialized = true;
1027 struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane);
1051 if (mode->clock && !sti_hqvdp_check_hw_scaling(hqvdp, mode,
1080 if (!hqvdp->xp70_initialized)
1082 sti_hqvdp_start_xp70(hqvdp);
1084 if (!hqvdp->vtg_registered) {
1086 if (clk_prepare_enable(hqvdp->clk_pix_main)) {
1092 if (sti_vtg_register_client(hqvdp->vtg,
1093 &hqvdp->vtg_nb,
1096 clk_disable_unprepare(hqvdp->clk_pix_main);
1099 hqvdp->vtg_registered = true;
1121 struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane);
1161 cmd_offset = sti_hqvdp_get_free_cmd(hqvdp);
1166 cmd = hqvdp->hqvdp_cmd + cmd_offset;
1232 writel(hqvdp->hqvdp_cmd_paddr + cmd_offset,
1233 hqvdp->regs + HQVDP_MBX_NEXT_CMD);
1237 hqvdp->btm_field_pending = true;
1239 dev_dbg(hqvdp->dev, "%s Posted command:0x%x\n",
1240 __func__, hqvdp->hqvdp_cmd_paddr + cmd_offset);
1277 struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane);
1279 hqvdp_debugfs_init(hqvdp, drm_plane->dev->primary);
1297 struct sti_hqvdp *hqvdp = dev_get_drvdata(dev);
1300 hqvdp->plane.desc = desc;
1301 hqvdp->plane.status = STI_PLANE_DISABLED;
1303 sti_hqvdp_init(hqvdp);
1305 res = drm_universal_plane_init(drm_dev, &hqvdp->plane.drm_plane, 1,
1315 drm_plane_helper_add(&hqvdp->plane.drm_plane, &sti_hqvdp_helpers_funcs);
1317 sti_plane_init_property(&hqvdp->plane, DRM_PLANE_TYPE_OVERLAY);
1319 return &hqvdp->plane.drm_plane;
1324 struct sti_hqvdp *hqvdp = dev_get_drvdata(dev);
1330 hqvdp->drm_dev = drm_dev;
1333 plane = sti_hqvdp_create(drm_dev, hqvdp->dev, STI_HQVDP_0);
1355 struct sti_hqvdp *hqvdp;
1360 hqvdp = devm_kzalloc(dev, sizeof(*hqvdp), GFP_KERNEL);
1361 if (!hqvdp) {
1366 hqvdp->dev = dev;
1374 hqvdp->regs = devm_ioremap(dev, res->start, resource_size(res));
1375 if (!hqvdp->regs) {
1381 hqvdp->clk = devm_clk_get(dev, "hqvdp");
1382 hqvdp->clk_pix_main = devm_clk_get(dev, "pix_main");
1383 if (IS_ERR(hqvdp->clk) || IS_ERR(hqvdp->clk_pix_main)) {
1389 hqvdp->reset = devm_reset_control_get(dev, "hqvdp");
1390 if (!IS_ERR(hqvdp->reset))
1391 reset_control_deassert(hqvdp->reset);
1395 hqvdp->vtg = of_vtg_find(vtg_np);
1398 platform_set_drvdata(pdev, hqvdp);
1409 { .compatible = "st,stih407-hqvdp", },
1416 .name = "sti-hqvdp",