Lines Matching refs:gdp
113 * @regs: gdp registers
114 * @clk_pix: pixel clock for the current gdp
115 * @clk_main_parent: gdp parent clock if main path used
116 * @clk_aux_parent: gdp parent clock if aux path used
149 readl(gdp->regs + reg ## _OFFSET))
183 static void gdp_dbg_nvn(struct seq_file *s, struct sti_gdp *gdp, int val)
189 if (gdp->node_list[i].top_field_paddr == val) {
190 base = gdp->node_list[i].top_field;
193 if (gdp->node_list[i].btm_field_paddr == val) {
194 base = gdp->node_list[i].btm_field;
218 struct sti_gdp *gdp = (struct sti_gdp *)node->info_ent->data;
219 struct drm_plane *drm_plane = &gdp->plane.drm_plane;
227 sti_plane_to_str(&gdp->plane), gdp->regs);
230 gdp_dbg_ctl(s, readl(gdp->regs + GAM_GDP_CTL_OFFSET));
233 gdp_dbg_vpo(s, readl(gdp->regs + GAM_GDP_VPO_OFFSET));
235 gdp_dbg_vps(s, readl(gdp->regs + GAM_GDP_VPS_OFFSET));
239 gdp_dbg_size(s, readl(gdp->regs + GAM_GDP_SIZE_OFFSET));
241 gdp_dbg_nvn(s, gdp, readl(gdp->regs + GAM_GDP_NVN_OFFSET));
245 gdp_dbg_ppt(s, readl(gdp->regs + GAM_GDP_PPT_OFFSET));
248 gdp_dbg_mst(s, readl(gdp->regs + GAM_GDP_MST_OFFSET));
285 struct sti_gdp *gdp = (struct sti_gdp *)node->info_ent->data;
289 seq_printf(s, "\n%s[%d].top", sti_plane_to_str(&gdp->plane), b);
290 gdp_node_dump_node(s, gdp->node_list[b].top_field);
291 seq_printf(s, "\n%s[%d].btm", sti_plane_to_str(&gdp->plane), b);
292 gdp_node_dump_node(s, gdp->node_list[b].btm_field);
318 static int gdp_debugfs_init(struct sti_gdp *gdp, struct drm_minor *minor)
324 switch (gdp->plane.desc) {
346 gdp_debugfs_files[i].data = gdp;
390 * @gdp: gdp pointer
397 static struct sti_gdp_node_list *sti_gdp_get_free_nodes(struct sti_gdp *gdp)
402 hw_nvn = readl(gdp->regs + GAM_GDP_NVN_OFFSET);
407 if ((hw_nvn != gdp->node_list[i].btm_field_paddr) &&
408 (hw_nvn != gdp->node_list[i].top_field_paddr))
409 return &gdp->node_list[i];
413 sti_plane_to_str(&gdp->plane), hw_nvn);
416 return &gdp->node_list[0];
421 * @gdp: gdp pointer
429 struct sti_gdp_node_list *sti_gdp_get_current_nodes(struct sti_gdp *gdp)
434 hw_nvn = readl(gdp->regs + GAM_GDP_NVN_OFFSET);
439 if ((hw_nvn == gdp->node_list[i].btm_field_paddr) ||
440 (hw_nvn == gdp->node_list[i].top_field_paddr))
441 return &gdp->node_list[i];
445 hw_nvn, sti_plane_to_str(&gdp->plane));
452 * @gdp: gdp pointer
456 static void sti_gdp_disable(struct sti_gdp *gdp)
460 DRM_DEBUG_DRIVER("%s\n", sti_plane_to_str(&gdp->plane));
464 gdp->node_list[i].top_field->gam_gdp_ppt |= GAM_GDP_PPT_IGNORE;
465 gdp->node_list[i].btm_field->gam_gdp_ppt |= GAM_GDP_PPT_IGNORE;
468 if (sti_vtg_unregister_client(gdp->vtg, &gdp->vtg_field_nb))
471 if (gdp->clk_pix)
472 clk_disable_unprepare(gdp->clk_pix);
474 gdp->plane.status = STI_PLANE_DISABLED;
475 gdp->vtg = NULL;
492 struct sti_gdp *gdp = container_of(nb, struct sti_gdp, vtg_field_nb);
494 if (gdp->plane.status == STI_PLANE_FLUSHING) {
497 sti_plane_to_str(&gdp->plane));
499 sti_gdp_disable(gdp);
504 gdp->is_curr_top = true;
507 gdp->is_curr_top = false;
517 static void sti_gdp_init(struct sti_gdp *gdp)
519 struct device_node *np = gdp->dev->of_node;
527 base = dma_alloc_wc(gdp->dev, size, &dma_addr, GFP_KERNEL);
540 gdp->node_list[i].top_field = base;
541 gdp->node_list[i].top_field_paddr = dma_addr;
551 gdp->node_list[i].btm_field = base;
552 gdp->node_list[i].btm_field_paddr = dma_addr;
562 switch (gdp->plane.desc) {
580 gdp->clk_pix = devm_clk_get(gdp->dev, clk_name);
581 if (IS_ERR(gdp->clk_pix))
584 gdp->clk_main_parent = devm_clk_get(gdp->dev, "main_parent");
585 if (IS_ERR(gdp->clk_main_parent))
588 gdp->clk_aux_parent = devm_clk_get(gdp->dev, "aux_parent");
589 if (IS_ERR(gdp->clk_aux_parent))
625 struct sti_gdp *gdp = to_sti_gdp(plane);
666 /* Set gdp clock */
667 if (mode->clock && gdp->clk_pix) {
673 * According to the mixer used, the gdp pixel clock
677 clkp = gdp->clk_main_parent;
679 clkp = gdp->clk_aux_parent;
682 clk_set_parent(gdp->clk_pix, clkp);
684 res = clk_set_rate(gdp->clk_pix, rate);
686 DRM_ERROR("Cannot set rate (%dHz) for gdp\n",
711 struct sti_gdp *gdp = to_sti_gdp(plane);
745 if (!gdp->vtg) {
746 struct sti_compositor *compo = dev_get_drvdata(gdp->dev);
749 /* Register gdp callback */
750 gdp->vtg = compo->vtg[mixer->id];
751 sti_vtg_register_client(gdp->vtg, &gdp->vtg_field_nb, crtc);
752 clk_prepare_enable(gdp->clk_pix);
766 list = sti_gdp_get_free_nodes(gdp);
770 dev_dbg(gdp->dev, "%s %s top_node:0x%p btm_node:0x%p\n", __func__,
794 dst_w = sti_gdp_get_dst(gdp->dev, dst_w, src_w);
795 dst_h = sti_gdp_get_dst(gdp->dev, dst_h, src_h);
827 curr_list = sti_gdp_get_current_nodes(gdp);
831 dev_dbg(gdp->dev, "Current NVN:0x%X\n",
832 readl(gdp->regs + GAM_GDP_NVN_OFFSET));
833 dev_dbg(gdp->dev, "Posted buff: %lx current buff: %x\n",
835 readl(gdp->regs + GAM_GDP_PML_OFFSET));
843 writel(gdp->is_curr_top ?
845 gdp->regs + GAM_GDP_NVN_OFFSET);
850 if (gdp->is_curr_top) {
858 gdp->regs + GAM_GDP_NVN_OFFSET);
862 writel(dma_updated_top, gdp->regs + GAM_GDP_NVN_OFFSET);
901 struct sti_gdp *gdp = to_sti_gdp(plane);
903 return gdp_debugfs_init(gdp, drm_plane->dev->primary);
922 struct sti_gdp *gdp;
925 gdp = devm_kzalloc(dev, sizeof(*gdp), GFP_KERNEL);
926 if (!gdp) {
931 gdp->dev = dev;
932 gdp->regs = baseaddr;
933 gdp->plane.desc = desc;
934 gdp->plane.status = STI_PLANE_DISABLED;
936 gdp->vtg_field_nb.notifier_call = sti_gdp_field_cb;
938 sti_gdp_init(gdp);
940 res = drm_universal_plane_init(drm_dev, &gdp->plane.drm_plane,
951 drm_plane_helper_add(&gdp->plane.drm_plane, &sti_gdp_helpers_funcs);
953 sti_plane_init_property(&gdp->plane, type);
955 return &gdp->plane.drm_plane;
958 devm_kfree(dev, gdp);