Lines Matching refs:format
170 u32 format = 0;
172 switch (fb->format->format) {
175 format |= BIT_DPU_LAY_DATA_ENDIAN_B3B2B1B0;
176 format |= BIT_DPU_LAY_FORMAT_ARGB8888;
181 format |= BIT_DPU_LAY_DATA_ENDIAN_B3B2B1B0;
185 format |= BIT_DPU_LAY_RB_OR_UV_SWITCH;
188 format |= BIT_DPU_LAY_FORMAT_ARGB8888;
192 format |= BIT_DPU_LAY_RB_OR_UV_SWITCH;
195 format |= BIT_DPU_LAY_FORMAT_ARGB8888;
199 format |= BIT_DPU_LAY_RB_OR_UV_SWITCH;
202 format |= BIT_DPU_LAY_FORMAT_RGB565;
206 format |= BIT_DPU_LAY_FORMAT_YUV420_2PLANE;
208 format |= BIT_DPU_LAY_DATA_ENDIAN_B0B1B2B3;
210 format |= BIT_DPU_LAY_NO_SWITCH;
214 format |= BIT_DPU_LAY_FORMAT_YUV420_2PLANE;
216 format |= BIT_DPU_LAY_DATA_ENDIAN_B0B1B2B3;
218 format |= BIT_DPU_LAY_RB_OR_UV_SWITCH;
222 format |= BIT_DPU_LAY_FORMAT_YUV422_2PLANE;
224 format |= BIT_DPU_LAY_DATA_ENDIAN_B3B2B1B0;
226 format |= BIT_DPU_LAY_RB_OR_UV_SWITCH;
230 format |= BIT_DPU_LAY_FORMAT_YUV422_2PLANE;
232 format |= BIT_DPU_LAY_DATA_ENDIAN_B0B1B2B3;
234 format |= BIT_DPU_LAY_NO_SWITCH;
237 format |= BIT_DPU_LAY_FORMAT_YUV420_3PLANE;
239 format |= BIT_DPU_LAY_DATA_ENDIAN_B0B1B2B3;
241 format |= BIT_DPU_LAY_NO_SWITCH;
244 format |= BIT_DPU_LAY_FORMAT_YUV420_3PLANE;
246 format |= BIT_DPU_LAY_DATA_ENDIAN_B0B1B2B3;
248 format |= BIT_DPU_LAY_RB_OR_UV_SWITCH;
254 return format;
325 u32 addr, size, offset, pitch, blend, format, rotation;
339 for (i = 0; i < fb->format->num_planes; i++) {
351 if (fb->format->num_planes == 3) {
353 pitch = (fb->pitches[0] / fb->format->cpp[0]) |
354 (fb->pitches[0] / fb->format->cpp[0] << 15);
356 pitch = fb->pitches[0] / fb->format->cpp[0];
366 format = drm_format_to_dpu(fb);
371 format |