Lines Matching defs:dpu
128 static int dpu_wait_stop_done(struct sprd_dpu *dpu)
130 struct dpu_context *ctx = &dpu->ctx;
143 drm_err(dpu->drm, "dpu wait for stop done time out!\n");
150 static int dpu_wait_update_done(struct sprd_dpu *dpu)
152 struct dpu_context *ctx = &dpu->ctx;
161 drm_err(dpu->drm, "dpu wait for reg update done time out!\n");
320 static void sprd_dpu_layer(struct sprd_dpu *dpu, struct drm_plane_state *state)
322 struct dpu_context *ctx = &dpu->ctx;
377 static void sprd_dpu_flip(struct sprd_dpu *dpu)
379 struct dpu_context *ctx = &dpu->ctx;
382 * Make sure the dpu is in stop status. DPU has no shadow
387 dpu_wait_stop_done(dpu);
393 dpu_wait_update_done(dpu);
404 static void sprd_dpu_init(struct sprd_dpu *dpu)
406 struct dpu_context *ctx = &dpu->ctx;
425 /* enable dpu update done INT */
427 /* enable dpu done INT */
429 /* enable dpu dpi vsync */
431 /* enable dpu TE INT */
452 static void sprd_dpu_fini(struct sprd_dpu *dpu)
454 struct dpu_context *ctx = &dpu->ctx;
460 static void sprd_dpi_init(struct sprd_dpu *dpu)
462 struct dpu_context *ctx = &dpu->ctx;
484 void sprd_dpu_run(struct sprd_dpu *dpu)
486 struct dpu_context *ctx = &dpu->ctx;
493 void sprd_dpu_stop(struct sprd_dpu *dpu)
495 struct dpu_context *ctx = &dpu->ctx;
500 dpu_wait_stop_done(dpu);
533 struct sprd_dpu *dpu = to_sprd_crtc(new_state->crtc);
535 /* start configure dpu layers */
536 sprd_dpu_layer(dpu, new_state);
544 struct sprd_dpu *dpu = to_sprd_crtc(old_state->crtc);
546 layer_reg_wr(&dpu->ctx, REG_LAY_CTRL, 0x00, old_state->zpos);
618 struct sprd_dpu *dpu = to_sprd_crtc(crtc);
623 drm_display_mode_to_videomode(mode, &dpu->ctx.vm);
630 dpu->ctx.if_type = SPRD_DPU_IF_DPI;
632 dpu->ctx.if_type = SPRD_DPU_IF_EDPI;
635 sprd_dpi_init(dpu);
641 struct sprd_dpu *dpu = to_sprd_crtc(crtc);
643 sprd_dpu_init(dpu);
645 drm_crtc_vblank_on(&dpu->base);
651 struct sprd_dpu *dpu = to_sprd_crtc(crtc);
652 struct drm_device *drm = dpu->base.dev;
654 drm_crtc_vblank_off(&dpu->base);
656 sprd_dpu_fini(dpu);
670 struct sprd_dpu *dpu = to_sprd_crtc(crtc);
671 struct drm_device *drm = dpu->base.dev;
673 sprd_dpu_flip(dpu);
685 struct sprd_dpu *dpu = to_sprd_crtc(crtc);
687 dpu_reg_set(&dpu->ctx, REG_DPU_INT_EN, BIT_DPU_INT_VSYNC);
694 struct sprd_dpu *dpu = to_sprd_crtc(crtc);
696 dpu_reg_clr(&dpu->ctx, REG_DPU_INT_EN, BIT_DPU_INT_VSYNC);
721 struct sprd_dpu *dpu;
723 dpu = drmm_crtc_alloc_with_planes(drm, struct sprd_dpu, base,
726 if (IS_ERR(dpu)) {
728 return dpu;
730 drm_crtc_helper_add(&dpu->base, &sprd_crtc_helper_funcs);
741 dpu->base.port = port;
744 return dpu;
749 struct sprd_dpu *dpu = data;
750 struct dpu_context *ctx = &dpu->ctx;
758 drm_warn(dpu->drm, "Warning: dpu underflow!\n");
761 /* dpu update done isr */
767 /* dpu stop done isr */
774 drm_crtc_handle_vblank(&dpu->base);
782 static int sprd_dpu_context_init(struct sprd_dpu *dpu,
786 struct dpu_context *ctx = &dpu->ctx;
798 dev_err(dev, "failed to map dpu registers\n");
806 /* disable and clear interrupts before register dpu IRQ. */
811 IRQF_TRIGGER_NONE, "DPU", dpu);
813 dev_err(dev, "failed to register dpu irq handler\n");
825 struct sprd_dpu *dpu;
833 dpu = sprd_crtc_init(drm, &plane->base, dev);
834 if (IS_ERR(dpu))
835 return PTR_ERR(dpu);
837 dpu->drm = drm;
838 dev_set_drvdata(dev, dpu);
840 ret = sprd_dpu_context_init(dpu, dev);
852 { .compatible = "sprd,sharkl3-dpu" },
873 .name = "sprd-dpu-drv",