Lines Matching defs:lvds
40 * struct rockchip_lvds_soc_data - rockchip lvds Soc private data
45 int (*probe)(struct platform_device *pdev, struct rockchip_lvds *lvds);
56 int output; /* rgb lvds or dual lvds output */
78 static inline void rk3288_writel(struct rockchip_lvds *lvds, u32 offset,
81 writel_relaxed(val, lvds->regs + offset);
82 if (lvds->output == DISPLAY_OUTPUT_LVDS)
84 writel_relaxed(val, lvds->regs + offset + RK3288_LVDS_CH1_OFFSET);
103 else if (strncmp(s, "lvds", 4) == 0)
121 struct rockchip_lvds *lvds = connector_to_lvds(connector);
122 struct drm_panel *panel = lvds->panel;
145 static int rk3288_lvds_poweron(struct rockchip_lvds *lvds)
150 ret = clk_enable(lvds->pclk);
152 DRM_DEV_ERROR(lvds->dev, "failed to enable lvds pclk %d\n", ret);
155 ret = pm_runtime_resume_and_get(lvds->dev);
157 DRM_DEV_ERROR(lvds->dev, "failed to get pm runtime: %d\n", ret);
158 clk_disable(lvds->pclk);
164 if (lvds->output == DISPLAY_OUTPUT_RGB) {
167 rk3288_writel(lvds, RK3288_LVDS_CH0_REG0, val);
168 rk3288_writel(lvds, RK3288_LVDS_CH0_REG2,
170 rk3288_writel(lvds, RK3288_LVDS_CH0_REG4,
177 rk3288_writel(lvds, RK3288_LVDS_CH0_REG5,
187 rk3288_writel(lvds, RK3288_LVDS_CH0_REG0, val);
188 rk3288_writel(lvds, RK3288_LVDS_CH0_REG1,
195 rk3288_writel(lvds, RK3288_LVDS_CH0_REG2,
204 rk3288_writel(lvds, RK3288_LVDS_CH0_REG4, 0x00);
205 rk3288_writel(lvds, RK3288_LVDS_CH0_REG5, 0x00);
207 rk3288_writel(lvds, RK3288_LVDS_CH0_REG3,
209 rk3288_writel(lvds, RK3288_LVDS_CH0_REGD,
211 rk3288_writel(lvds, RK3288_LVDS_CH0_REG20,
214 rk3288_writel(lvds, RK3288_LVDS_CFG_REGC,
216 rk3288_writel(lvds, RK3288_LVDS_CFG_REG21,
222 static void rk3288_lvds_poweroff(struct rockchip_lvds *lvds)
227 rk3288_writel(lvds, RK3288_LVDS_CFG_REG21,
229 rk3288_writel(lvds, RK3288_LVDS_CFG_REGC,
233 ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val);
235 DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret);
237 pm_runtime_put(lvds->dev);
238 clk_disable(lvds->pclk);
244 struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
251 if (lvds->output == DISPLAY_OUTPUT_RGB)
252 if (lvds->pins && !IS_ERR(lvds->pins->default_state))
253 pinctrl_select_state(lvds->pins->p,
254 lvds->pins->default_state);
255 val = lvds->format | LVDS_CH0_EN;
256 if (lvds->output == DISPLAY_OUTPUT_RGB)
258 else if (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)
266 ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val);
268 DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret);
273 static int rk3288_lvds_set_vop_source(struct rockchip_lvds *lvds,
279 ret = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder);
287 ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON6, val);
296 struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
300 drm_panel_prepare(lvds->panel);
302 ret = rk3288_lvds_poweron(lvds);
304 DRM_DEV_ERROR(lvds->dev, "failed to power on LVDS: %d\n", ret);
305 drm_panel_unprepare(lvds->panel);
311 DRM_DEV_ERROR(lvds->dev, "failed to configure LVDS: %d\n", ret);
312 drm_panel_unprepare(lvds->panel);
316 ret = rk3288_lvds_set_vop_source(lvds, encoder);
318 DRM_DEV_ERROR(lvds->dev, "failed to set VOP source: %d\n", ret);
319 drm_panel_unprepare(lvds->panel);
323 drm_panel_enable(lvds->panel);
328 struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
330 drm_panel_disable(lvds->panel);
331 rk3288_lvds_poweroff(lvds);
332 drm_panel_unprepare(lvds->panel);
335 static int px30_lvds_poweron(struct rockchip_lvds *lvds)
339 ret = pm_runtime_resume_and_get(lvds->dev);
341 DRM_DEV_ERROR(lvds->dev, "failed to get pm runtime: %d\n", ret);
346 ret = regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1,
350 pm_runtime_put(lvds->dev);
355 static void px30_lvds_poweroff(struct rockchip_lvds *lvds)
357 regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1,
361 pm_runtime_put(lvds->dev);
367 struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
369 if (lvds->output != DISPLAY_OUTPUT_LVDS) {
370 DRM_DEV_ERROR(lvds->dev, "Unsupported display output %d\n",
371 lvds->output);
376 return regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1,
377 PX30_LVDS_FORMAT(lvds->format),
378 PX30_LVDS_FORMAT(lvds->format));
381 static int px30_lvds_set_vop_source(struct rockchip_lvds *lvds,
386 vop = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder);
390 return regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1,
397 struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
401 drm_panel_prepare(lvds->panel);
403 ret = px30_lvds_poweron(lvds);
405 DRM_DEV_ERROR(lvds->dev, "failed to power on LVDS: %d\n", ret);
406 drm_panel_unprepare(lvds->panel);
412 DRM_DEV_ERROR(lvds->dev, "failed to configure LVDS: %d\n", ret);
413 drm_panel_unprepare(lvds->panel);
417 ret = px30_lvds_set_vop_source(lvds, encoder);
419 DRM_DEV_ERROR(lvds->dev, "failed to set VOP source: %d\n", ret);
420 drm_panel_unprepare(lvds->panel);
424 drm_panel_enable(lvds->panel);
429 struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
431 drm_panel_disable(lvds->panel);
432 px30_lvds_poweroff(lvds);
433 drm_panel_unprepare(lvds->panel);
451 struct rockchip_lvds *lvds)
455 lvds->regs = devm_platform_ioremap_resource(pdev, 0);
456 if (IS_ERR(lvds->regs))
457 return PTR_ERR(lvds->regs);
459 lvds->pclk = devm_clk_get(lvds->dev, "pclk_lvds");
460 if (IS_ERR(lvds->pclk)) {
461 DRM_DEV_ERROR(lvds->dev, "could not get pclk_lvds\n");
462 return PTR_ERR(lvds->pclk);
465 lvds->pins = devm_kzalloc(lvds->dev, sizeof(*lvds->pins),
467 if (!lvds->pins)
470 lvds->pins->p = devm_pinctrl_get(lvds->dev);
471 if (IS_ERR(lvds->pins->p)) {
472 DRM_DEV_ERROR(lvds->dev, "no pinctrl handle\n");
473 devm_kfree(lvds->dev, lvds->pins);
474 lvds->pins = NULL;
476 lvds->pins->default_state =
477 pinctrl_lookup_state(lvds->pins->p, "lcdc");
478 if (IS_ERR(lvds->pins->default_state)) {
479 DRM_DEV_ERROR(lvds->dev, "no default pinctrl state\n");
480 devm_kfree(lvds->dev, lvds->pins);
481 lvds->pins = NULL;
485 ret = clk_prepare(lvds->pclk);
487 DRM_DEV_ERROR(lvds->dev, "failed to prepare pclk_lvds\n");
495 struct rockchip_lvds *lvds)
500 ret = regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1,
507 lvds->dphy = devm_phy_get(&pdev->dev, "dphy");
508 if (IS_ERR(lvds->dphy))
509 return PTR_ERR(lvds->dphy);
511 ret = phy_init(lvds->dphy);
515 ret = phy_set_mode(lvds->dphy, PHY_MODE_LVDS);
519 return phy_power_on(lvds->dphy);
534 .compatible = "rockchip,rk3288-lvds",
538 .compatible = "rockchip,px30-lvds",
548 struct rockchip_lvds *lvds = dev_get_drvdata(dev);
558 lvds->drm_dev = drm_dev;
562 "can't found port point, please init lvds panel port!\n");
569 &lvds->panel, &lvds->bridge);
576 DRM_DEV_ERROR(dev, "lvds port does not have any children\n");
583 if (lvds->panel)
584 remote = lvds->panel->dev->of_node;
586 remote = lvds->bridge->of_node;
589 lvds->output = DISPLAY_OUTPUT_RGB;
591 lvds->output = rockchip_lvds_name_to_output(name);
593 if (lvds->output < 0) {
595 ret = lvds->output;
601 lvds->format = LVDS_VESA_18;
603 lvds->format = rockchip_lvds_name_to_format(name);
605 if (lvds->format < 0) {
607 ret = lvds->format;
611 encoder = &lvds->encoder.encoder;
622 drm_encoder_helper_add(encoder, lvds->soc_data->helper_funcs);
623 connector = &lvds->connector;
625 if (lvds->panel) {
639 ret = drm_bridge_attach(encoder, lvds->bridge, NULL,
644 connector = drm_bridge_connector_init(lvds->drm_dev, encoder);
682 struct rockchip_lvds *lvds = dev_get_drvdata(dev);
685 encoder_funcs = lvds->soc_data->helper_funcs;
686 encoder_funcs->disable(&lvds->encoder.encoder);
688 drm_connector_cleanup(&lvds->connector);
689 drm_encoder_cleanup(&lvds->encoder.encoder);
700 struct rockchip_lvds *lvds;
707 lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL);
708 if (!lvds)
711 lvds->dev = dev;
715 lvds->soc_data = match->data;
717 lvds->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
719 if (IS_ERR(lvds->grf)) {
721 return PTR_ERR(lvds->grf);
724 ret = lvds->soc_data->probe(pdev, lvds);
730 dev_set_drvdata(dev, lvds);
735 clk_unprepare(lvds->pclk);
743 struct rockchip_lvds *lvds = platform_get_drvdata(pdev);
746 clk_unprepare(lvds->pclk);
753 .name = "rockchip-lvds",