Lines Matching refs:hdmi
73 static inline u8 hdmi_readb(struct rk3066_hdmi *hdmi, u16 offset)
75 return readl_relaxed(hdmi->regs + offset);
78 static inline void hdmi_writeb(struct rk3066_hdmi *hdmi, u16 offset, u32 val)
80 writel_relaxed(val, hdmi->regs + offset);
83 static inline void hdmi_modb(struct rk3066_hdmi *hdmi, u16 offset,
86 u8 temp = hdmi_readb(hdmi, offset) & ~msk;
89 hdmi_writeb(hdmi, offset, temp);
92 static void rk3066_hdmi_i2c_init(struct rk3066_hdmi *hdmi)
96 ddc_bus_freq = (hdmi->tmdsclk >> 2) / HDMI_SCL_RATE;
98 hdmi_writeb(hdmi, HDMI_DDC_BUS_FREQ_L, ddc_bus_freq & 0xFF);
99 hdmi_writeb(hdmi, HDMI_DDC_BUS_FREQ_H, (ddc_bus_freq >> 8) & 0xFF);
102 hdmi_modb(hdmi, HDMI_INTR_MASK1, HDMI_INTR_EDID_MASK, 0);
103 hdmi_writeb(hdmi, HDMI_INTR_STATUS1, HDMI_INTR_EDID_MASK);
106 static inline u8 rk3066_hdmi_get_power_mode(struct rk3066_hdmi *hdmi)
108 return hdmi_readb(hdmi, HDMI_SYS_CTRL) & HDMI_SYS_POWER_MODE_MASK;
111 static void rk3066_hdmi_set_power_mode(struct rk3066_hdmi *hdmi, int mode)
116 current_mode = rk3066_hdmi_get_power_mode(hdmi);
118 DRM_DEV_DEBUG(hdmi->dev, "mode :%d\n", mode);
119 DRM_DEV_DEBUG(hdmi->dev, "current_mode :%d\n", current_mode);
134 DRM_DEV_DEBUG(hdmi->dev, "%d: next_mode :%d\n", i, next_mode);
137 hdmi_modb(hdmi, HDMI_SYS_CTRL,
140 hdmi_writeb(hdmi, HDMI_SYS_CTRL,
144 hdmi_writeb(hdmi, HDMI_SYS_CTRL,
148 hdmi_writeb(hdmi, HDMI_SYS_CTRL,
162 hdmi->tmdsclk = DEFAULT_PLLA_RATE;
166 rk3066_hdmi_upload_frame(struct rk3066_hdmi *hdmi, int setup_rc,
171 hdmi_modb(hdmi, HDMI_CP_AUTO_SEND_CTRL, mask, disable);
173 hdmi_writeb(hdmi, HDMI_CP_BUF_INDEX, frame_index);
185 hdmi_writeb(hdmi, HDMI_CP_BUF_ACC_HB0 + i * 4,
189 hdmi_modb(hdmi, HDMI_CP_AUTO_SEND_CTRL, mask, enable);
195 static int rk3066_hdmi_config_avi(struct rk3066_hdmi *hdmi,
202 &hdmi->connector, mode);
204 if (hdmi->hdmi_data.enc_out_format == HDMI_COLORSPACE_YUV444)
206 else if (hdmi->hdmi_data.enc_out_format == HDMI_COLORSPACE_YUV422)
211 frame.avi.colorimetry = hdmi->hdmi_data.colorimetry;
214 return rk3066_hdmi_upload_frame(hdmi, rc, &frame,
218 static int rk3066_hdmi_config_video_timing(struct rk3066_hdmi *hdmi,
232 if (hdmi->hdmi_data.vic == 2 || hdmi->hdmi_data.vic == 3)
238 hdmi_writeb(hdmi, HDMI_EXT_VIDEO_PARA, value);
242 hdmi_writeb(hdmi, HDMI_EXT_HTOTAL_L, value & 0xFF);
243 hdmi_writeb(hdmi, HDMI_EXT_HTOTAL_H, (value >> 8) & 0xFF);
246 hdmi_writeb(hdmi, HDMI_EXT_HBLANK_L, value & 0xFF);
247 hdmi_writeb(hdmi, HDMI_EXT_HBLANK_H, (value >> 8) & 0xFF);
250 hdmi_writeb(hdmi, HDMI_EXT_HDELAY_L, value & 0xFF);
251 hdmi_writeb(hdmi, HDMI_EXT_HDELAY_H, (value >> 8) & 0xFF);
254 hdmi_writeb(hdmi, HDMI_EXT_HDURATION_L, value & 0xFF);
255 hdmi_writeb(hdmi, HDMI_EXT_HDURATION_H, (value >> 8) & 0xFF);
258 hdmi_writeb(hdmi, HDMI_EXT_VTOTAL_L, value & 0xFF);
259 hdmi_writeb(hdmi, HDMI_EXT_VTOTAL_H, (value >> 8) & 0xFF);
262 hdmi_writeb(hdmi, HDMI_EXT_VBLANK_L, value & 0xFF);
265 hdmi_writeb(hdmi, HDMI_EXT_VDELAY, value & 0xFF);
268 hdmi_writeb(hdmi, HDMI_EXT_VDURATION, value & 0xFF);
274 rk3066_hdmi_phy_write(struct rk3066_hdmi *hdmi, u16 offset, u8 value)
276 hdmi_writeb(hdmi, offset, value);
277 hdmi_modb(hdmi, HDMI_SYS_CTRL,
280 hdmi_modb(hdmi, HDMI_SYS_CTRL, HDMI_SYS_PLL_RESET_MASK, 0);
284 static void rk3066_hdmi_config_phy(struct rk3066_hdmi *hdmi)
287 hdmi_writeb(hdmi, HDMI_DEEP_COLOR_MODE, 0x22);
290 * The semi-public documentation does not describe the hdmi registers
294 if (hdmi->tmdsclk > 100000000) {
295 rk3066_hdmi_phy_write(hdmi, 0x158, 0x0E);
296 rk3066_hdmi_phy_write(hdmi, 0x15c, 0x00);
297 rk3066_hdmi_phy_write(hdmi, 0x160, 0x60);
298 rk3066_hdmi_phy_write(hdmi, 0x164, 0x00);
299 rk3066_hdmi_phy_write(hdmi, 0x168, 0xDA);
300 rk3066_hdmi_phy_write(hdmi, 0x16c, 0xA1);
301 rk3066_hdmi_phy_write(hdmi, 0x170, 0x0e);
302 rk3066_hdmi_phy_write(hdmi, 0x174, 0x22);
303 rk3066_hdmi_phy_write(hdmi, 0x178, 0x00);
304 } else if (hdmi->tmdsclk > 50000000) {
305 rk3066_hdmi_phy_write(hdmi, 0x158, 0x06);
306 rk3066_hdmi_phy_write(hdmi, 0x15c, 0x00);
307 rk3066_hdmi_phy_write(hdmi, 0x160, 0x60);
308 rk3066_hdmi_phy_write(hdmi, 0x164, 0x00);
309 rk3066_hdmi_phy_write(hdmi, 0x168, 0xCA);
310 rk3066_hdmi_phy_write(hdmi, 0x16c, 0xA3);
311 rk3066_hdmi_phy_write(hdmi, 0x170, 0x0e);
312 rk3066_hdmi_phy_write(hdmi, 0x174, 0x20);
313 rk3066_hdmi_phy_write(hdmi, 0x178, 0x00);
315 rk3066_hdmi_phy_write(hdmi, 0x158, 0x02);
316 rk3066_hdmi_phy_write(hdmi, 0x15c, 0x00);
317 rk3066_hdmi_phy_write(hdmi, 0x160, 0x60);
318 rk3066_hdmi_phy_write(hdmi, 0x164, 0x00);
319 rk3066_hdmi_phy_write(hdmi, 0x168, 0xC2);
320 rk3066_hdmi_phy_write(hdmi, 0x16c, 0xA2);
321 rk3066_hdmi_phy_write(hdmi, 0x170, 0x0e);
322 rk3066_hdmi_phy_write(hdmi, 0x174, 0x20);
323 rk3066_hdmi_phy_write(hdmi, 0x178, 0x00);
327 static int rk3066_hdmi_setup(struct rk3066_hdmi *hdmi,
330 struct drm_display_info *display = &hdmi->connector.display_info;
332 hdmi->hdmi_data.vic = drm_match_cea_mode(mode);
333 hdmi->hdmi_data.enc_out_format = HDMI_COLORSPACE_RGB;
335 if (hdmi->hdmi_data.vic == 6 || hdmi->hdmi_data.vic == 7 ||
336 hdmi->hdmi_data.vic == 21 || hdmi->hdmi_data.vic == 22 ||
337 hdmi->hdmi_data.vic == 2 || hdmi->hdmi_data.vic == 3 ||
338 hdmi->hdmi_data.vic == 17 || hdmi->hdmi_data.vic == 18)
339 hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_601;
341 hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_709;
343 hdmi->tmdsclk = mode->clock * 1000;
346 hdmi_modb(hdmi, HDMI_VIDEO_CTRL2, HDMI_VIDEO_AUDIO_DISABLE_MASK,
350 if (rk3066_hdmi_get_power_mode(hdmi) != HDMI_SYS_POWER_MODE_B)
351 rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_B);
354 hdmi_modb(hdmi, HDMI_AV_CTRL1,
356 hdmi_writeb(hdmi, HDMI_VIDEO_CTRL1,
360 hdmi_writeb(hdmi, HDMI_DEEP_COLOR_MODE, 0x20);
362 rk3066_hdmi_config_video_timing(hdmi, mode);
365 hdmi_modb(hdmi, HDMI_HDCP_CTRL, HDMI_VIDEO_MODE_MASK,
367 rk3066_hdmi_config_avi(hdmi, mode);
369 hdmi_modb(hdmi, HDMI_HDCP_CTRL, HDMI_VIDEO_MODE_MASK, 0);
372 rk3066_hdmi_config_phy(hdmi);
374 rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_E);
382 rk3066_hdmi_i2c_init(hdmi);
385 hdmi_modb(hdmi, HDMI_VIDEO_CTRL2,
395 struct rk3066_hdmi *hdmi = encoder_to_rk3066_hdmi(encoder);
398 drm_mode_copy(&hdmi->previous_mode, adj_mode);
403 struct rk3066_hdmi *hdmi = encoder_to_rk3066_hdmi(encoder);
406 mux = drm_of_encoder_active_endpoint_id(hdmi->dev->of_node, encoder);
412 regmap_write(hdmi->grf_regmap, GRF_SOC_CON0, val);
414 DRM_DEV_DEBUG(hdmi->dev, "hdmi encoder enable select: vop%s\n",
417 rk3066_hdmi_setup(hdmi, &hdmi->previous_mode);
422 struct rk3066_hdmi *hdmi = encoder_to_rk3066_hdmi(encoder);
424 DRM_DEV_DEBUG(hdmi->dev, "hdmi encoder disable\n");
426 if (rk3066_hdmi_get_power_mode(hdmi) == HDMI_SYS_POWER_MODE_E) {
427 hdmi_writeb(hdmi, HDMI_VIDEO_CTRL2,
429 hdmi_modb(hdmi, HDMI_VIDEO_CTRL2,
434 rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_A);
470 struct rk3066_hdmi *hdmi = connector_to_rk3066_hdmi(connector);
472 return (hdmi_readb(hdmi, HDMI_HPG_MENS_STA) & HDMI_HPG_IN_STATUS_HIGH) ?
478 struct rk3066_hdmi *hdmi = connector_to_rk3066_hdmi(connector);
482 if (!hdmi->ddc)
485 edid = drm_get_edid(connector, hdmi->ddc);
510 struct rk3066_hdmi *hdmi = connector_to_rk3066_hdmi(connector);
512 return &hdmi->encoder.encoder;
550 rk3066_hdmi_register(struct drm_device *drm, struct rk3066_hdmi *hdmi)
552 struct drm_encoder *encoder = &hdmi->encoder.encoder;
553 struct device *dev = hdmi->dev;
570 hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD;
572 drm_connector_helper_add(&hdmi->connector,
574 drm_connector_init_with_ddc(drm, &hdmi->connector,
577 hdmi->ddc);
579 drm_connector_attach_encoder(&hdmi->connector, encoder);
586 struct rk3066_hdmi *hdmi = dev_id;
590 if (rk3066_hdmi_get_power_mode(hdmi) == HDMI_SYS_POWER_MODE_A)
591 hdmi_writeb(hdmi, HDMI_SYS_CTRL, HDMI_SYS_POWER_MODE_B);
593 interrupt = hdmi_readb(hdmi, HDMI_INTR_STATUS1);
595 hdmi_writeb(hdmi, HDMI_INTR_STATUS1, interrupt);
598 hdmi->i2c->stat = interrupt;
599 complete(&hdmi->i2c->cmpltn);
610 struct rk3066_hdmi *hdmi = dev_id;
612 drm_helper_hpd_irq_event(hdmi->connector.dev);
617 static int rk3066_hdmi_i2c_read(struct rk3066_hdmi *hdmi, struct i2c_msg *msgs)
623 ret = wait_for_completion_timeout(&hdmi->i2c->cmpltn, HZ / 10);
624 if (!ret || hdmi->i2c->stat & HDMI_INTR_EDID_ERR)
628 *buf++ = hdmi_readb(hdmi, HDMI_DDC_READ_FIFO_ADDR);
633 static int rk3066_hdmi_i2c_write(struct rk3066_hdmi *hdmi, struct i2c_msg *msgs)
644 reinit_completion(&hdmi->i2c->cmpltn);
647 hdmi->i2c->segment_addr = msgs->buf[0];
649 hdmi->i2c->ddc_addr = msgs->buf[0];
652 hdmi_writeb(hdmi, HDMI_EDID_FIFO_ADDR, 0x00);
655 hdmi_writeb(hdmi, HDMI_EDID_WORD_ADDR, hdmi->i2c->ddc_addr);
658 hdmi_writeb(hdmi, HDMI_EDID_SEGMENT_POINTER, hdmi->i2c->segment_addr);
666 struct rk3066_hdmi *hdmi = i2c_get_adapdata(adap);
667 struct rk3066_hdmi_i2c *i2c = hdmi->i2c;
672 rk3066_hdmi_i2c_init(hdmi);
675 hdmi_modb(hdmi, HDMI_INTR_MASK1,
680 DRM_DEV_DEBUG(hdmi->dev,
685 ret = rk3066_hdmi_i2c_read(hdmi, &msgs[i]);
687 ret = rk3066_hdmi_i2c_write(hdmi, &msgs[i]);
697 hdmi_modb(hdmi, HDMI_INTR_MASK1, HDMI_INTR_EDID_MASK, 0);
714 static struct i2c_adapter *rk3066_hdmi_i2c_adapter(struct rk3066_hdmi *hdmi)
720 i2c = devm_kzalloc(hdmi->dev, sizeof(*i2c), GFP_KERNEL);
730 adap->dev.parent = hdmi->dev;
731 adap->dev.of_node = hdmi->dev->of_node;
734 i2c_set_adapdata(adap, hdmi);
738 DRM_DEV_ERROR(hdmi->dev, "cannot add %s I2C adapter\n",
740 devm_kfree(hdmi->dev, i2c);
744 hdmi->i2c = i2c;
746 DRM_DEV_DEBUG(hdmi->dev, "registered %s I2C bus driver\n", adap->name);
756 struct rk3066_hdmi *hdmi;
760 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
761 if (!hdmi)
764 hdmi->dev = dev;
765 hdmi->drm_dev = drm;
766 hdmi->regs = devm_platform_ioremap_resource(pdev, 0);
767 if (IS_ERR(hdmi->regs))
768 return PTR_ERR(hdmi->regs);
774 hdmi->hclk = devm_clk_get(dev, "hclk");
775 if (IS_ERR(hdmi->hclk)) {
777 return PTR_ERR(hdmi->hclk);
780 ret = clk_prepare_enable(hdmi->hclk);
786 hdmi->grf_regmap = syscon_regmap_lookup_by_phandle(dev->of_node,
788 if (IS_ERR(hdmi->grf_regmap)) {
790 ret = PTR_ERR(hdmi->grf_regmap);
795 hdmi_writeb(hdmi, HDMI_INTERNAL_CLK_DIVIDER, 25);
797 hdmi->ddc = rk3066_hdmi_i2c_adapter(hdmi);
798 if (IS_ERR(hdmi->ddc)) {
799 ret = PTR_ERR(hdmi->ddc);
800 hdmi->ddc = NULL;
804 rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_B);
806 hdmi_writeb(hdmi, HDMI_INTR_MASK1, HDMI_INTR_HOTPLUG);
807 hdmi_writeb(hdmi, HDMI_INTR_MASK2, 0);
808 hdmi_writeb(hdmi, HDMI_INTR_MASK3, 0);
809 hdmi_writeb(hdmi, HDMI_INTR_MASK4, 0);
810 rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_A);
812 ret = rk3066_hdmi_register(drm, hdmi);
816 dev_set_drvdata(dev, hdmi);
820 dev_name(dev), hdmi);
822 DRM_DEV_ERROR(dev, "failed to request hdmi irq: %d\n", ret);
829 hdmi->connector.funcs->destroy(&hdmi->connector);
830 hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);
832 i2c_put_adapter(hdmi->ddc);
834 clk_disable_unprepare(hdmi->hclk);
842 struct rk3066_hdmi *hdmi = dev_get_drvdata(dev);
844 hdmi->connector.funcs->destroy(&hdmi->connector);
845 hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);
847 i2c_put_adapter(hdmi->ddc);
848 clk_disable_unprepare(hdmi->hclk);
867 { .compatible = "rockchip,rk3066-hdmi" },
876 .name = "rockchip-rk3066-hdmi",