Lines Matching refs:dp
14 #include "cdn-dp-core.h"
15 #include "cdn-dp-reg.h"
24 void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, unsigned long clk)
26 writel(clk / 1000000, dp->regs + SW_CLK_H);
29 void cdn_dp_clock_reset(struct cdn_dp_device *dp)
45 writel(val, dp->regs + SOURCE_DPTX_CAR);
48 writel(val, dp->regs + SOURCE_PHY_CAR);
54 writel(val, dp->regs + SOURCE_PKT_CAR);
62 writel(val, dp->regs + SOURCE_AIF_CAR);
68 writel(val, dp->regs + SOURCE_CIPHER_CAR);
72 writel(val, dp->regs + SOURCE_CRYPTO_CAR);
75 writel(0, dp->regs + APB_INT_MASK);
78 static int cdn_dp_mailbox_read(struct cdn_dp_device *dp)
82 ret = readx_poll_timeout(readl, dp->regs + MAILBOX_EMPTY_ADDR,
88 return readl(dp->regs + MAILBOX0_RD_DATA) & 0xff;
91 static int cdp_dp_mailbox_write(struct cdn_dp_device *dp, u8 val)
95 ret = readx_poll_timeout(readl, dp->regs + MAILBOX_FULL_ADDR,
101 writel(val, dp->regs + MAILBOX0_WR_DATA);
106 static int cdn_dp_mailbox_validate_receive(struct cdn_dp_device *dp,
116 ret = cdn_dp_mailbox_read(dp);
132 if (cdn_dp_mailbox_read(dp) < 0)
141 static int cdn_dp_mailbox_read_receive(struct cdn_dp_device *dp,
148 ret = cdn_dp_mailbox_read(dp);
158 static int cdn_dp_mailbox_send(struct cdn_dp_device *dp, u8 module_id,
170 ret = cdp_dp_mailbox_write(dp, header[i]);
176 ret = cdp_dp_mailbox_write(dp, message[i]);
184 static int cdn_dp_reg_write(struct cdn_dp_device *dp, u16 addr, u32 val)
194 return cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_WRITE_REGISTER,
198 static int cdn_dp_reg_write_bit(struct cdn_dp_device *dp, u16 addr,
212 return cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_WRITE_FIELD,
216 int cdn_dp_dpcd_read(struct cdn_dp_device *dp, u32 addr, u8 *data, u16 len)
226 ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_READ_DPCD,
231 ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX,
237 ret = cdn_dp_mailbox_read_receive(dp, reg, sizeof(reg));
241 ret = cdn_dp_mailbox_read_receive(dp, data, len);
247 int cdn_dp_dpcd_write(struct cdn_dp_device *dp, u32 addr, u8 value)
258 ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_WRITE_DPCD,
263 ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX,
268 ret = cdn_dp_mailbox_read_receive(dp, reg, sizeof(reg));
277 DRM_DEV_ERROR(dp->dev, "dpcd write failed: %d\n", ret);
281 int cdn_dp_load_firmware(struct cdn_dp_device *dp, const u32 *i_mem,
289 dp->regs + APB_CTRL);
292 writel(*i_mem++, dp->regs + ADDR_IMEM + i);
295 writel(*d_mem++, dp->regs + ADDR_DMEM + i);
298 writel(0, dp->regs + APB_CTRL);
301 ret = readx_poll_timeout(readl, dp->regs + KEEP_ALIVE,
304 DRM_DEV_ERROR(dp->dev, "failed to loaded the FW reg = %x\n",
309 reg = readl(dp->regs + VER_L) & 0xff;
310 dp->fw_version = reg;
311 reg = readl(dp->regs + VER_H) & 0xff;
312 dp->fw_version |= reg << 8;
313 reg = readl(dp->regs + VER_LIB_L_ADDR) & 0xff;
314 dp->fw_version |= reg << 16;
315 reg = readl(dp->regs + VER_LIB_H_ADDR) & 0xff;
316 dp->fw_version |= reg << 24;
318 DRM_DEV_DEBUG(dp->dev, "firmware version: %x\n", dp->fw_version);
323 int cdn_dp_set_firmware_active(struct cdn_dp_device *dp, bool enable)
335 ret = cdp_dp_mailbox_write(dp, msg[i]);
342 ret = cdn_dp_mailbox_read(dp);
353 DRM_DEV_ERROR(dp->dev, "set firmware active failed\n");
357 int cdn_dp_set_host_cap(struct cdn_dp_device *dp, u8 lanes, bool flip)
371 ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX,
377 ret = cdn_dp_reg_write(dp, DP_AUX_SWAP_INVERSION_CONTROL,
382 DRM_DEV_ERROR(dp->dev, "set host cap failed: %d\n", ret);
386 int cdn_dp_event_config(struct cdn_dp_device *dp)
395 ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_ENABLE_EVENT,
398 DRM_DEV_ERROR(dp->dev, "set event config failed: %d\n", ret);
403 u32 cdn_dp_get_event(struct cdn_dp_device *dp)
405 return readl(dp->regs + SW_EVENTS0);
408 int cdn_dp_get_hpd_status(struct cdn_dp_device *dp)
413 ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_HPD_STATE,
418 ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX,
423 ret = cdn_dp_mailbox_read_receive(dp, &status, sizeof(status));
430 DRM_DEV_ERROR(dp->dev, "get hpd status failed: %d\n", ret);
437 struct cdn_dp_device *dp = data;
445 ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_GET_EDID,
450 ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX,
456 ret = cdn_dp_mailbox_read_receive(dp, reg, sizeof(reg));
460 ret = cdn_dp_mailbox_read_receive(dp, edid, length);
469 DRM_DEV_ERROR(dp->dev, "get block[%d] edid failed: %d\n", block,
475 static int cdn_dp_training_start(struct cdn_dp_device *dp)
484 ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_TRAINING_CONTROL,
492 ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX,
497 ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX,
503 ret = cdn_dp_mailbox_read_receive(dp, event, sizeof(event));
514 DRM_DEV_ERROR(dp->dev, "training failed: %d\n", ret);
518 static int cdn_dp_get_training_status(struct cdn_dp_device *dp)
523 ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_READ_LINK_STAT,
528 ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX,
534 ret = cdn_dp_mailbox_read_receive(dp, status, sizeof(status));
538 dp->max_rate = drm_dp_bw_code_to_link_rate(status[0]);
539 dp->max_lanes = status[1];
543 DRM_DEV_ERROR(dp->dev, "get training status failed: %d\n", ret);
547 int cdn_dp_train_link(struct cdn_dp_device *dp)
551 ret = cdn_dp_training_start(dp);
553 DRM_DEV_ERROR(dp->dev, "Failed to start training %d\n", ret);
557 ret = cdn_dp_get_training_status(dp);
559 DRM_DEV_ERROR(dp->dev, "Failed to get training stat %d\n", ret);
563 DRM_DEV_DEBUG_KMS(dp->dev, "rate:0x%x, lanes:%d\n", dp->max_rate,
564 dp->max_lanes);
568 int cdn_dp_set_video_status(struct cdn_dp_device *dp, int active)
575 ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_SET_VIDEO,
578 DRM_DEV_ERROR(dp->dev, "set video status failed: %d\n", ret);
630 int cdn_dp_config_video(struct cdn_dp_device *dp)
632 struct video_info *video = &dp->video_info;
633 struct drm_display_mode *mode = &dp->mode;
642 link_rate = dp->max_rate / 1000;
644 ret = cdn_dp_reg_write(dp, BND_HSYNC2VSYNC, VIF_BYPASS_INTERLACE);
648 ret = cdn_dp_reg_write(dp, HSYNC2VSYNC_POL_CTRL, 0);
662 do_div(symbol, dp->max_lanes * link_rate * 8);
666 DRM_DEV_ERROR(dp->dev,
668 mode->clock, dp->max_lanes, link_rate);
676 ret = cdn_dp_reg_write(dp, DP_FRAMER_TU, val);
682 val /= (dp->max_lanes * link_rate);
685 ret = cdn_dp_reg_write(dp, DP_VC_TABLE(15), val);
706 ret = cdn_dp_reg_write(dp, DP_FRAMER_PXL_REPR, val);
712 ret = cdn_dp_reg_write(dp, DP_FRAMER_SP, val);
718 ret = cdn_dp_reg_write(dp, DP_FRONT_BACK_PORCH, val);
723 ret = cdn_dp_reg_write(dp, DP_BYTE_COUNT, val);
728 ret = cdn_dp_reg_write(dp, MSA_HORIZONTAL_0, val);
734 ret = cdn_dp_reg_write(dp, MSA_HORIZONTAL_1, val);
740 ret = cdn_dp_reg_write(dp, MSA_VERTICAL_0, val);
746 ret = cdn_dp_reg_write(dp, MSA_VERTICAL_1, val);
751 ret = cdn_dp_reg_write(dp, MSA_MISC, val);
755 ret = cdn_dp_reg_write(dp, STREAM_CONFIG, 1);
761 ret = cdn_dp_reg_write(dp, DP_HORIZONTAL, val);
767 ret = cdn_dp_reg_write(dp, DP_VERTICAL_0, val);
772 ret = cdn_dp_reg_write(dp, DP_VERTICAL_1, val);
776 ret = cdn_dp_reg_write_bit(dp, DP_VB_ID, 2, 1, 0);
780 DRM_DEV_ERROR(dp->dev, "config video failed: %d\n", ret);
784 int cdn_dp_audio_stop(struct cdn_dp_device *dp, struct audio_info *audio)
788 ret = cdn_dp_reg_write(dp, AUDIO_PACK_CONTROL, 0);
790 DRM_DEV_ERROR(dp->dev, "audio stop failed: %d\n", ret);
794 writel(0, dp->regs + SPDIF_CTRL_ADDR);
797 writel(0, dp->regs + AUDIO_SRC_CNTL);
798 writel(0, dp->regs + AUDIO_SRC_CNFG);
799 writel(AUDIO_SW_RST, dp->regs + AUDIO_SRC_CNTL);
800 writel(0, dp->regs + AUDIO_SRC_CNTL);
803 writel(0, dp->regs + SMPL2PKT_CNTL);
804 writel(AUDIO_SW_RST, dp->regs + SMPL2PKT_CNTL);
805 writel(0, dp->regs + SMPL2PKT_CNTL);
808 writel(AUDIO_SW_RST, dp->regs + FIFO_CNTL);
809 writel(0, dp->regs + FIFO_CNTL);
812 clk_disable_unprepare(dp->spdif_clk);
817 int cdn_dp_audio_mute(struct cdn_dp_device *dp, bool enable)
821 ret = cdn_dp_reg_write_bit(dp, DP_VB_ID, 4, 1, enable);
823 DRM_DEV_ERROR(dp->dev, "audio mute failed: %d\n", ret);
828 static void cdn_dp_audio_config_i2s(struct cdn_dp_device *dp,
835 if (dp->max_lanes == 1)
845 writel(0x0, dp->regs + SPDIF_CTRL_ADDR);
847 writel(SYNC_WR_TO_CH_ZERO, dp->regs + FIFO_CNTL);
853 writel(val, dp->regs + SMPL2PKT_CNFG);
865 writel(val, dp->regs + AUDIO_SRC_CNFG);
874 writel(val, dp->regs + STTS_BIT_CH(i));
908 writel(val, dp->regs + COM_CH_STTS_BITS);
910 writel(SMPL2PKT_EN, dp->regs + SMPL2PKT_CNTL);
911 writel(I2S_DEC_START, dp->regs + AUDIO_SRC_CNTL);
914 static void cdn_dp_audio_config_spdif(struct cdn_dp_device *dp)
918 writel(SYNC_WR_TO_CH_ZERO, dp->regs + FIFO_CNTL);
921 writel(val, dp->regs + SMPL2PKT_CNFG);
922 writel(SMPL2PKT_EN, dp->regs + SMPL2PKT_CNTL);
925 writel(val, dp->regs + SPDIF_CTRL_ADDR);
927 clk_prepare_enable(dp->spdif_clk);
928 clk_set_rate(dp->spdif_clk, CDN_DP_SPDIF_CLK);
931 int cdn_dp_audio_config(struct cdn_dp_device *dp, struct audio_info *audio)
937 reset_control_assert(dp->spdif_rst);
938 reset_control_deassert(dp->spdif_rst);
941 ret = cdn_dp_reg_write(dp, CM_LANE_CTRL, LANE_REF_CYC);
945 ret = cdn_dp_reg_write(dp, CM_CTRL, 0);
950 cdn_dp_audio_config_i2s(dp, audio);
952 cdn_dp_audio_config_spdif(dp);
954 ret = cdn_dp_reg_write(dp, AUDIO_PACK_CONTROL, AUDIO_PACK_EN);
958 DRM_DEV_ERROR(dp->dev, "audio config failed: %d\n", ret);