Lines Matching defs:rdev
297 static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev,
299 static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev);
300 static void trinity_apply_state_adjust_rules(struct radeon_device *rdev,
311 static struct trinity_power_info *trinity_get_pi(struct radeon_device *rdev)
313 struct trinity_power_info *pi = rdev->pm.dpm.priv;
318 static void trinity_gfx_powergating_initialize(struct radeon_device *rdev)
320 struct trinity_power_info *pi = trinity_get_pi(rdev);
324 u32 xclk = radeon_get_xclk(rdev);
329 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM,
349 trinity_override_dynamic_mg_powergating(rdev);
358 static void trinity_mg_clockgating_enable(struct radeon_device *rdev,
387 static void trinity_mg_clockgating_initialize(struct radeon_device *rdev)
395 trinity_program_clk_gating_hw_sequence(rdev, seq, count);
398 static void trinity_gfx_clockgating_enable(struct radeon_device *rdev,
411 static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev,
420 static void trinity_program_override_mgpg_sequences(struct radeon_device *rdev,
430 static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev)
438 trinity_program_override_mgpg_sequences(rdev, seq, count);
441 static void trinity_ls_clockgating_enable(struct radeon_device *rdev,
455 trinity_program_clk_gating_hw_sequence(rdev, seq, count);
458 static void trinity_gfx_powergating_enable(struct radeon_device *rdev,
472 static void trinity_gfx_dynamic_mgpg_enable(struct radeon_device *rdev,
497 trinity_gfx_dynamic_mgpg_config(rdev);
501 static void trinity_enable_clock_power_gating(struct radeon_device *rdev)
503 struct trinity_power_info *pi = trinity_get_pi(rdev);
506 sumo_gfx_clockgating_initialize(rdev);
508 trinity_mg_clockgating_initialize(rdev);
510 trinity_gfx_powergating_initialize(rdev);
512 trinity_ls_clockgating_enable(rdev, true);
513 trinity_mg_clockgating_enable(rdev, true);
516 trinity_gfx_clockgating_enable(rdev, true);
518 trinity_gfx_dynamic_mgpg_enable(rdev, true);
520 trinity_gfx_powergating_enable(rdev, true);
523 static void trinity_disable_clock_power_gating(struct radeon_device *rdev)
525 struct trinity_power_info *pi = trinity_get_pi(rdev);
528 trinity_gfx_powergating_enable(rdev, false);
530 trinity_gfx_dynamic_mgpg_enable(rdev, false);
532 trinity_gfx_clockgating_enable(rdev, false);
534 trinity_mg_clockgating_enable(rdev, false);
535 trinity_ls_clockgating_enable(rdev, false);
539 static void trinity_set_divider_value(struct radeon_device *rdev,
547 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM,
557 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM,
568 static void trinity_set_ds_dividers(struct radeon_device *rdev,
580 static void trinity_set_ss_dividers(struct radeon_device *rdev,
592 static void trinity_set_vid(struct radeon_device *rdev, u32 index, u32 vid)
594 struct trinity_power_info *pi = trinity_get_pi(rdev);
595 u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid);
610 static void trinity_set_allos_gnb_slow(struct radeon_device *rdev,
622 static void trinity_set_force_nbp_state(struct radeon_device *rdev,
634 static void trinity_set_display_wm(struct radeon_device *rdev,
646 static void trinity_set_vce_wm(struct radeon_device *rdev,
658 static void trinity_set_at(struct radeon_device *rdev,
670 static void trinity_program_power_level(struct radeon_device *rdev,
673 struct trinity_power_info *pi = trinity_get_pi(rdev);
678 trinity_set_divider_value(rdev, index, pl->sclk);
679 trinity_set_vid(rdev, index, pl->vddc_index);
680 trinity_set_ss_dividers(rdev, index, pl->ss_divider_index);
681 trinity_set_ds_dividers(rdev, index, pl->ds_divider_index);
682 trinity_set_allos_gnb_slow(rdev, index, pl->allow_gnb_slow);
683 trinity_set_force_nbp_state(rdev, index, pl->force_nbp_state);
684 trinity_set_display_wm(rdev, index, pl->display_wm);
685 trinity_set_vce_wm(rdev, index, pl->vce_wm);
686 trinity_set_at(rdev, index, pi->at[index]);
689 static void trinity_power_level_enable_disable(struct radeon_device *rdev,
702 static bool trinity_dpm_enabled(struct radeon_device *rdev)
710 static void trinity_start_dpm(struct radeon_device *rdev)
721 trinity_dpm_config(rdev, true);
724 static void trinity_wait_for_dpm_enabled(struct radeon_device *rdev)
728 for (i = 0; i < rdev->usec_timeout; i++) {
733 for (i = 0; i < rdev->usec_timeout; i++) {
738 for (i = 0; i < rdev->usec_timeout; i++) {
745 static void trinity_stop_dpm(struct radeon_device *rdev)
755 trinity_dpm_config(rdev, false);
758 static void trinity_start_am(struct radeon_device *rdev)
763 static void trinity_reset_am(struct radeon_device *rdev)
769 static void trinity_wait_for_level_0(struct radeon_device *rdev)
773 for (i = 0; i < rdev->usec_timeout; i++) {
780 static void trinity_enable_power_level_0(struct radeon_device *rdev)
782 trinity_power_level_enable_disable(rdev, 0, true);
785 static void trinity_force_level_0(struct radeon_device *rdev)
787 trinity_dpm_force_state(rdev, 0);
790 static void trinity_unforce_levels(struct radeon_device *rdev)
792 trinity_dpm_no_forced_level(rdev);
795 static void trinity_program_power_levels_0_to_n(struct radeon_device *rdev,
805 trinity_program_power_level(rdev, &new_ps->levels[i], i);
806 trinity_power_level_enable_disable(rdev, i, true);
810 trinity_power_level_enable_disable(rdev, i, false);
813 static void trinity_program_bootup_state(struct radeon_device *rdev)
815 struct trinity_power_info *pi = trinity_get_pi(rdev);
818 trinity_program_power_level(rdev, &pi->boot_pl, 0);
819 trinity_power_level_enable_disable(rdev, 0, true);
822 trinity_power_level_enable_disable(rdev, i, false);
825 static void trinity_setup_uvd_clock_table(struct radeon_device *rdev,
837 static void trinity_setup_uvd_dpm_interval(struct radeon_device *rdev,
843 u32 xclk = radeon_get_xclk(rdev);
877 static void trinity_setup_uvd_clocks(struct radeon_device *rdev,
881 struct trinity_power_info *pi = trinity_get_pi(rdev);
884 trinity_gfx_powergating_enable(rdev, false);
890 trinity_setup_uvd_dpm_interval(rdev, 0);
892 trinity_setup_uvd_clock_table(rdev, new_rps);
899 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
901 trinity_setup_uvd_dpm_interval(rdev, 3000);
904 trinity_uvd_dpm_config(rdev);
910 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
914 trinity_gfx_powergating_enable(rdev, true);
918 static void trinity_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,
929 trinity_setup_uvd_clocks(rdev, new_rps, old_rps);
932 static void trinity_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev,
943 trinity_setup_uvd_clocks(rdev, new_rps, old_rps);
946 static void trinity_set_vce_clock(struct radeon_device *rdev,
954 vce_v1_0_enable_mgcg(rdev, false);
956 vce_v1_0_enable_mgcg(rdev, true);
957 radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk);
961 static void trinity_program_ttt(struct radeon_device *rdev)
963 struct trinity_power_info *pi = trinity_get_pi(rdev);
972 static void trinity_enable_att(struct radeon_device *rdev)
981 static void trinity_program_sclk_dpm(struct radeon_device *rdev)
986 u32 xclk = radeon_get_xclk(rdev);
999 static int trinity_set_thermal_temperature_range(struct radeon_device *rdev,
1017 rdev->pm.dpm.thermal.min_temp = low_temp;
1018 rdev->pm.dpm.thermal.max_temp = high_temp;
1023 static void trinity_update_current_ps(struct radeon_device *rdev,
1027 struct trinity_power_info *pi = trinity_get_pi(rdev);
1034 static void trinity_update_requested_ps(struct radeon_device *rdev,
1038 struct trinity_power_info *pi = trinity_get_pi(rdev);
1045 void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable)
1047 struct trinity_power_info *pi = trinity_get_pi(rdev);
1050 trinity_acquire_mutex(rdev);
1051 trinity_dpm_bapm_enable(rdev, enable);
1052 trinity_release_mutex(rdev);
1056 int trinity_dpm_enable(struct radeon_device *rdev)
1058 struct trinity_power_info *pi = trinity_get_pi(rdev);
1060 trinity_acquire_mutex(rdev);
1062 if (trinity_dpm_enabled(rdev)) {
1063 trinity_release_mutex(rdev);
1067 trinity_program_bootup_state(rdev);
1068 sumo_program_vc(rdev, 0x00C00033);
1069 trinity_start_am(rdev);
1071 trinity_program_ttt(rdev);
1072 trinity_enable_att(rdev);
1074 trinity_program_sclk_dpm(rdev);
1075 trinity_start_dpm(rdev);
1076 trinity_wait_for_dpm_enabled(rdev);
1077 trinity_dpm_bapm_enable(rdev, false);
1078 trinity_release_mutex(rdev);
1080 trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
1085 int trinity_dpm_late_enable(struct radeon_device *rdev)
1089 trinity_acquire_mutex(rdev);
1090 trinity_enable_clock_power_gating(rdev);
1092 if (rdev->irq.installed &&
1093 r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) {
1094 ret = trinity_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX);
1096 trinity_release_mutex(rdev);
1099 rdev->irq.dpm_thermal = true;
1100 radeon_irq_set(rdev);
1102 trinity_release_mutex(rdev);
1107 void trinity_dpm_disable(struct radeon_device *rdev)
1109 trinity_acquire_mutex(rdev);
1110 if (!trinity_dpm_enabled(rdev)) {
1111 trinity_release_mutex(rdev);
1114 trinity_dpm_bapm_enable(rdev, false);
1115 trinity_disable_clock_power_gating(rdev);
1116 sumo_clear_vc(rdev);
1117 trinity_wait_for_level_0(rdev);
1118 trinity_stop_dpm(rdev);
1119 trinity_reset_am(rdev);
1120 trinity_release_mutex(rdev);
1122 if (rdev->irq.installed &&
1123 r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) {
1124 rdev->irq.dpm_thermal = false;
1125 radeon_irq_set(rdev);
1128 trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
1131 static void trinity_get_min_sclk_divider(struct radeon_device *rdev)
1133 struct trinity_power_info *pi = trinity_get_pi(rdev);
1139 static void trinity_setup_nbp_sim(struct radeon_device *rdev,
1142 struct trinity_power_info *pi = trinity_get_pi(rdev);
1157 int trinity_dpm_force_performance_level(struct radeon_device *rdev,
1160 struct trinity_power_info *pi = trinity_get_pi(rdev);
1172 ret = trinity_dpm_n_levels_disabled(rdev, ps->num_levels - 1);
1177 ret = trinity_dpm_n_levels_disabled(rdev, 0);
1183 rdev->pm.dpm.forced_level = level;
1188 int trinity_dpm_pre_set_power_state(struct radeon_device *rdev)
1190 struct trinity_power_info *pi = trinity_get_pi(rdev);
1191 struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
1194 trinity_update_requested_ps(rdev, new_ps);
1196 trinity_apply_state_adjust_rules(rdev,
1203 int trinity_dpm_set_power_state(struct radeon_device *rdev)
1205 struct trinity_power_info *pi = trinity_get_pi(rdev);
1209 trinity_acquire_mutex(rdev);
1212 trinity_dpm_bapm_enable(rdev, rdev->pm.dpm.ac_power);
1213 trinity_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
1214 trinity_enable_power_level_0(rdev);
1215 trinity_force_level_0(rdev);
1216 trinity_wait_for_level_0(rdev);
1217 trinity_setup_nbp_sim(rdev, new_ps);
1218 trinity_program_power_levels_0_to_n(rdev, new_ps, old_ps);
1219 trinity_force_level_0(rdev);
1220 trinity_unforce_levels(rdev);
1221 trinity_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
1222 trinity_set_vce_clock(rdev, new_ps, old_ps);
1224 trinity_release_mutex(rdev);
1229 void trinity_dpm_post_set_power_state(struct radeon_device *rdev)
1231 struct trinity_power_info *pi = trinity_get_pi(rdev);
1234 trinity_update_current_ps(rdev, new_ps);
1237 void trinity_dpm_setup_asic(struct radeon_device *rdev)
1239 trinity_acquire_mutex(rdev);
1240 sumo_program_sstp(rdev);
1241 sumo_take_smu_control(rdev, true);
1242 trinity_get_min_sclk_divider(rdev);
1243 trinity_release_mutex(rdev);
1247 void trinity_dpm_reset_asic(struct radeon_device *rdev)
1249 struct trinity_power_info *pi = trinity_get_pi(rdev);
1251 trinity_acquire_mutex(rdev);
1253 trinity_enable_power_level_0(rdev);
1254 trinity_force_level_0(rdev);
1255 trinity_wait_for_level_0(rdev);
1256 trinity_program_bootup_state(rdev);
1257 trinity_force_level_0(rdev);
1258 trinity_unforce_levels(rdev);
1260 trinity_release_mutex(rdev);
1264 static u16 trinity_convert_voltage_index_to_value(struct radeon_device *rdev,
1267 struct trinity_power_info *pi = trinity_get_pi(rdev);
1268 u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid_2bit);
1279 static void trinity_patch_boot_state(struct radeon_device *rdev,
1282 struct trinity_power_info *pi = trinity_get_pi(rdev);
1290 static u8 trinity_calculate_vce_wm(struct radeon_device *rdev, u32 sclk)
1297 static void trinity_construct_boot_state(struct radeon_device *rdev)
1299 struct trinity_power_info *pi = trinity_get_pi(rdev);
1313 static u8 trinity_get_sleep_divider_id_from_clock(struct radeon_device *rdev,
1316 struct trinity_power_info *pi = trinity_get_pi(rdev);
1337 static u32 trinity_get_valid_engine_clock(struct radeon_device *rdev,
1340 struct trinity_power_info *pi = trinity_get_pi(rdev);
1354 static void trinity_patch_thermal_state(struct radeon_device *rdev,
1358 struct trinity_power_info *pi = trinity_get_pi(rdev);
1378 trinity_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr);
1384 trinity_calculate_vce_wm(rdev, ps->levels[0].sclk);
1387 static u8 trinity_calculate_display_wm(struct radeon_device *rdev,
1407 static u32 trinity_get_uvd_clock_index(struct radeon_device *rdev,
1410 struct trinity_power_info *pi = trinity_get_pi(rdev);
1426 static void trinity_adjust_uvd_state(struct radeon_device *rdev,
1430 struct trinity_power_info *pi = trinity_get_pi(rdev);
1435 high_index = trinity_get_uvd_clock_index(rdev, rps);
1460 static int trinity_get_vce_clock_voltage(struct radeon_device *rdev,
1466 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
1490 static void trinity_apply_state_adjust_rules(struct radeon_device *rdev,
1496 struct trinity_power_info *pi = trinity_get_pi(rdev);
1503 u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count;
1506 return trinity_patch_thermal_state(rdev, ps, current_ps);
1508 trinity_adjust_uvd_state(rdev, new_rps);
1511 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
1512 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
1524 trinity_get_valid_engine_clock(rdev, min_sclk);
1529 if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk)
1530 ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk;
1532 trinity_get_vce_clock_voltage(rdev, new_rps->evclk, new_rps->ecclk, &min_vce_voltage);
1538 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr);
1545 trinity_calculate_display_wm(rdev, ps, i);
1547 trinity_calculate_vce_wm(rdev, ps->levels[0].sclk);
1575 static void trinity_cleanup_asic(struct radeon_device *rdev)
1577 sumo_take_smu_control(rdev, false);
1581 static void trinity_pre_display_configuration_change(struct radeon_device *rdev)
1583 struct trinity_power_info *pi = trinity_get_pi(rdev);
1586 trinity_dce_enable_voltage_adjustment(rdev, false);
1590 static void trinity_add_dccac_value(struct radeon_device *rdev)
1593 u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count;
1594 u64 disp_clk = rdev->clock.default_dispclk / 100;
1606 void trinity_dpm_display_configuration_changed(struct radeon_device *rdev)
1608 struct trinity_power_info *pi = trinity_get_pi(rdev);
1611 trinity_dce_enable_voltage_adjustment(rdev, true);
1612 trinity_add_dccac_value(rdev);
1636 static void trinity_parse_pplib_non_clock_info(struct radeon_device *rdev,
1656 rdev->pm.dpm.boot_ps = rps;
1657 trinity_patch_boot_state(rdev, ps);
1660 rdev->pm.dpm.uvd_ps = rps;
1663 static void trinity_parse_pplib_clock_info(struct radeon_device *rdev,
1667 struct trinity_power_info *pi = trinity_get_pi(rdev);
1685 static int trinity_parse_power_table(struct radeon_device *rdev)
1687 struct radeon_mode_info *mode_info = &rdev->mode_info;
1717 rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries,
1720 if (!rdev->pm.dpm.ps)
1729 if (!rdev->pm.power_state[i].clock_info) {
1730 kfree(rdev->pm.dpm.ps);
1735 kfree(rdev->pm.dpm.ps);
1738 rdev->pm.dpm.ps[i].ps_priv = ps;
1750 trinity_parse_pplib_clock_info(rdev,
1751 &rdev->pm.dpm.ps[i], k,
1755 trinity_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
1760 rdev->pm.dpm.num_ps = state_array->ucNumEntries;
1765 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx;
1770 rdev->pm.dpm.vce_states[i].sclk = sclk;
1771 rdev->pm.dpm.vce_states[i].mclk = 0;
1785 static u32 trinity_convert_did_to_freq(struct radeon_device *rdev, u8 did)
1787 struct trinity_power_info *pi = trinity_get_pi(rdev);
1804 static int trinity_parse_sys_info_table(struct radeon_device *rdev)
1806 struct trinity_power_info *pi = trinity_get_pi(rdev);
1807 struct radeon_mode_info *mode_info = &rdev->mode_info;
1866 sumo_construct_sclk_voltage_mapping_table(rdev,
1869 sumo_construct_vid_mapping_table(rdev, &pi->sys_info.vid_mapping_table,
1892 trinity_convert_did_to_freq(rdev,
1895 trinity_convert_did_to_freq(rdev,
1905 int trinity_dpm_init(struct radeon_device *rdev)
1913 rdev->pm.dpm.priv = pi;
1925 if (rdev->pdev->subsystem_vendor == 0x1462)
1945 ret = trinity_parse_sys_info_table(rdev);
1949 trinity_construct_boot_state(rdev);
1951 ret = r600_get_platform_caps(rdev);
1955 ret = r600_parse_extended_power_table(rdev);
1959 ret = trinity_parse_power_table(rdev);
1969 void trinity_dpm_print_power_state(struct radeon_device *rdev,
1982 trinity_convert_voltage_index_to_value(rdev, pl->vddc_index));
1984 r600_dpm_print_ps_status(rdev, rps);
1987 void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
1990 struct trinity_power_info *pi = trinity_get_pi(rdev);
2005 trinity_convert_voltage_index_to_value(rdev, pl->vddc_index));
2009 u32 trinity_dpm_get_current_sclk(struct radeon_device *rdev)
2011 struct trinity_power_info *pi = trinity_get_pi(rdev);
2027 u32 trinity_dpm_get_current_mclk(struct radeon_device *rdev)
2029 struct trinity_power_info *pi = trinity_get_pi(rdev);
2034 void trinity_dpm_fini(struct radeon_device *rdev)
2038 trinity_cleanup_asic(rdev); /* ??? */
2040 for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
2041 kfree(rdev->pm.dpm.ps[i].ps_priv);
2043 kfree(rdev->pm.dpm.ps);
2044 kfree(rdev->pm.dpm.priv);
2045 r600_free_extended_power_table(rdev);
2048 u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low)
2050 struct trinity_power_info *pi = trinity_get_pi(rdev);
2059 u32 trinity_dpm_get_mclk(struct radeon_device *rdev, bool low)
2061 struct trinity_power_info *pi = trinity_get_pi(rdev);