Lines Matching refs:ecclk
2915 u32 evclk, u32 ecclk, u16 *voltage)
2922 if (((evclk == 0) && (ecclk == 0)) ||
2930 (ecclk <= table->entries[i].ecclk)) {
2989 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
2990 si_get_vce_clock_voltage(rdev, rps->evclk, rps->ecclk,
2994 rps->ecclk = 0;
5916 (old_rps->ecclk != new_rps->ecclk)) {
5918 if (new_rps->evclk || new_rps->ecclk)
5922 radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk);